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1.
The quality of software systems are determined in part by their optimal configurations. Optimal configurations are desired when the software is being deployed and during its lifetime. However, initial deployment and subsequent dynamic reconfiguration of a software system is difficult because of the interplay of many interdependent factors, including cost, time, application state, and system resources. As the size and complexity of software systems increases, procedures (manual or automated) that assume a static software architecture and environment are becoming untenable. We have developed a novel technique for carrying out the deployment and reconfiguration planning processes that leverages recent advances in the field of temporal planning. We describe a tool called Planit, which manages the deployment and reconfiguration of a software system utilizing a temporal planner. Given a model of the structure of a software system, the network upon which the system should be hosted, and a goal configuration, Planit will use the temporal planner to devise possible deployments of the system. Given information about changes in the state of the system, network and a revised goal, Planit will use the temporal planner to devise possible reconfigurations of the system. We present the results of a case study in which Planit is applied to a system consisting of various components that communicate across an application-level overlay network. An earlier version of this paper was presented at ICTAI’03.
Naveed Arshad (Corresponding author)Email:
Dennis HeimbignerEmail:
Alexander L. WolfURL: http://www.doc.ic.ac.uk/~alw/
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2.
A design pattern is realized in various forms depending on the context of the applications. There has been intensive research on detecting pattern instances in models and in implementations. However, little work addresses variations of pattern realization. This paper describes an approach for evaluating conformance of pattern variations. This approach uses a divide-and-conquer strategy to evaluate the structural conformance of a UML class diagram to the solution of a design pattern. A design pattern is specified in an extension of the UML that defines the pattern in terms of roles. To demonstrate the approach, we use the Visitor pattern and two case studies of a price calculator and a word processor. We also present a prototype tool that supports the approach.
Wuwei ShenEmail:
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3.
The unified modelling language (UML), besides its traditional use in describing software artifacts, is increasingly being used for conceptual modelling, the activity of describing an application domain. For models to be clear and unambiguous, every construct of the modelling language must have well-defined semantics, which is its mapping to elements of the semantic domain. When used for conceptual modelling, the semantic domain of UML is the application domain, as perceived by the modeller. Modellers perceive and structure their perceptions using cognitive concepts. This paper proposes a mapping of the UML association construct to those concepts. Implications for the use of the association construct for conceptual modelling are derived, a UML profile for conceptual modelling is presented, along with the results of a case study using the semantics and profile.
Joerg EvermannEmail:
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4.
3D computer graphics have been an important feature in games development since it was first introduced in the early 80s and there is no doubt that 3D based content is often viewed as more attractive in games than the more abstract 2D graphics. Many games publishers are keen to leverage their success in the console market into the mobile phone platform. However, the resource constraints of mobile phones and the fragmented nature of the environment present considerable challenges for games developers. In this paper we consider some of the current constraints together with current and, probable, future developments both in the software and hardware of mobile phones. As part of this process we benchmark some of the latest and most prevalent software and hardware devices to ascertain both the quality of the graphics produced and the effects upon battery life. Whilst our test results highlight that the current market does indeed present challenges, our research into the future developments highlights the fact we are approaching greater standardization, which will be an important factor for the successful development of 3D mobile games.
Fadi Chehimi (Corresponding author)Email:
Paul CoultonEmail:
Reuben EdwardsEmail:
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5.
Technology evolution makes possible the integration of heterogeneous components as programmable elements (processors), hardware dedicated blocks, hierarchical memories and buses. Furthermore, an optimized reconfigurable logic core embedded within a System-on-Chip will associate the performances of dedicated architecture and the flexibility of programmable ones. In order to increase performances, some of the applications are carried out in hardware, using dynamically reconfigurable logic, rather than software, using programmable elements. This approach offers a suitable hardware support to design malleable systems able to adapt themselves to a specific application. This article makes a synthesis of the Ardoise project. The first objective of Ardoise project was to design and to produce a dynamically reconfigurable platform based on commercial FPGAs. The concept of dynamically reconfigurable architecture depends partially on new design methodologies elaboration as well as on the programming environment. The platform architecture was designed to be suitable for real-time image processing. The article outlines mainly the Ardoise tools aspect: development environment and real-time management of the hardware tasks. The proposed methodology is based on a dynamic management of tasks according to an application scenario written using C++ language.
Lounis KessalEmail:
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6.
This paper describes the recently published Technical Specification ISO 16071 from the International Organisation for Standardisation (ISO), along with the process through which the document has been developed. ISO TS 16071 contains guidelines on designing accessible software. This paper also relates the activities within ISO to other ongoing standardisation activities, within, for example, W3C and ETSI. Scope, contents, guidelines and the definition of accessibility in ISO 16071 are discussed in relation to other definitions. Finally, the process of turning the technical specification (TS) into an international standard (IS) is discussed.
Jan GulliksenEmail:
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7.
The Stanford Event Heap has been shown to provide appropriate support for constructing interactive workspace applications. Given this success it is natural to consider the Event Heap as a platform to support other classes of Ubiquitous Computing applications. In this paper we argue that the distributed, spontaneous nature of these applications places additional demands on the Event Heap that require extensions to both the engineering and API. Suitable extensions are described and their use to support a typical Ubicomp application is discussed.
Oliver Storz (Corresponding author)Email:
Adrian FridayEmail:
Nigel DaviesEmail:
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8.
The paper reflects on the unique experience of social and technological development in Lithuania since the regaining of independence as a newly reshaped society constructing a distinctive competitive IST-based model at global level. This has presented Lithuanian pattern of how to integrate different experiences and relations between generations in implementing complex information society approaches. The resulting programme in general is linked to the Lisbon objectives of the European Union. The experience of transitional countries in Europe, each different but facing some common problems, may be useful to developing countries in Africa.
Arunas Augustinaitis (Corresponding author)Email:
Richard EnnalsEmail:
Egle MalinauskieneEmail:
Rimantas PetrauskasEmail:
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9.
This research involves a methodology and associated proof of concept tool to partially automate software validation by comparing UML use cases with particular execution scenarios in source code. These execution scenarios are represented as the internal documentation (identifier names and comments) associated with sequences of execution in static call graphs. This methodology has the potential to reduce validation time and associated costs in many organizations, by enabling quick and easy validation of software relative to the use cases that describe the requirements. The proof of concept tool as it currently stands is intended as an aid to an IV&V software engineer, to assist in directing the software validation process. The approach is lightweight and easily implemented.
William E. Hughes Jr.Email:
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10.
Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficiency. This paper develops techniques for mapping rigid image registration applications onto configurable hardware under real-time performance constraints. Building on the framework of homogeneous parameterized dataflow, which provides an effective formal model of design and analysis of hardware and software for signal processing applications, we develop novel methods for representing and exploring the hardware design space when mapping image registration algorithms onto configurable hardware. Our techniques result in an efficient framework for trading off performance and configurable hardware resource usage based on the constraints of a given application. Based on trends that we have observed when applying these techniques, we also present a novel architecture that enables dynamically-reconfigurable image registration. This proposed architecture has the ability to tune its parallel processing structure adaptively based on relevant characteristics of the input images.
Shuvra S. BhattacharyyaEmail:
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