基于Q-learning的不确定环境BDI Agent最优策略规划研究

BDI模型能够很好地解决在特定环境下的Agent的推理和决策问题,但在动态和不确定环境下缺少决策和学习的能力。强化学习解决了Agent在未知环境下的决策问题,却缺少BDI模型中的规则描述和逻辑推理。针对BDI在未知和动态环境下的策略规划问题,提出基于强化学习Q-learning算法来实现BDI Agent学习和规划的方法,并针对BDI的实现模型ASL的决策机制做出了改进,最后在ASL的仿真平台Jason上建立了迷宫的仿真,仿真实验表明,在加入Q-learning学习机制后的新的ASL系统中,Agent在不确定环境下依然可以完成任务。     

Low power and high speed design issues of CMOS Hamming code generation and error detection circuit at 22 nm and 16 nm channel length of MOS transistor

Microsystem Technologies - This paper represents low power and high speed design issues of Hamming code generation and error detection circuit using complementary metal oxide semiconductor (CMOS)...     

Annealing and doping-dependent magnetoresistance in single layer poly(3-hexyl-thiophene) organic semiconductor device

We compare the current density–voltage (J–V) and magnetoconductance (MC) response of a poly(3-hexyl-thiophene) (P3HT) device (Au/P3HT(350 nm)/Al) before and after annealing above the glass transition temperature of 150 °C under vacuum. There is a decrease of more than 3 orders of magnitude in current density due to an increase of the charge injection barriers after de-doping through annealing. An increase, approaching 1 order of magnitude, in the negative MC response after annealing can be explained by a shift in the Fermi level due to de-doping, according to the bipolaron mechanism. We successfully tune the charge injection barrier through re-doping by photo-oxidation. This leads to the charge injection and transport transitioning from unipolar to ambipolar, as the bias increases, and we model the MC response using a combination of bipolaron and triplet-polaron interaction mechanisms.     

一种军棋机器博弈的多棋子协同博弈方法

针对在军棋博弈不完全信息对弈中，面对棋子不同价值、不同位置、不同搭配所产生的不同棋力，传统的单子意图搜索算法，不能满足棋子之间的协同性与沟通性，同时也缺乏对敌方的引诱与欺骗等高级对抗能力。本文提出一种结合UCT搜索策略的高价值棋子博弈方法，实现高价值棋子协同博弈的策略。实战经验表明:高价值多棋子军棋协同博弈策略优于单棋子军棋博弈策略。     

The benefit of being physically present: A survey of experimental works comparing copresent robots,telepresent robots and virtual agents

The effects of physical embodiment and physical presence were explored through a survey of 33 experimental works comparing how people interacted with physical robots and virtual agents. A qualitative assessment of the direction of quantitative effects demonstrated that robots were more persuasive and perceived more positively when physically present in a user׳s environment than when digitally-displayed on a screen either as a video feed of the same robot or as a virtual character analog; robots also led to better user performance when they were collocated as opposed to shown via video on a screen. However, participants did not respond differently to physical robots and virtual agents when both were displayed digitally on a screen – suggesting that physical presence, rather than physical embodiment, characterizes people׳s responses to social robots. Implications for understanding psychological response to physical and virtual agents and for methodological design are discussed.     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

Machine learning techniques for scheduling jobs with incompatible families and unequal ready times on parallel batch machines

This research is motivated by a scheduling problem found in the diffusion and oxidation areas of semiconductor wafer fabrication facilities, where the machines can be modeled as parallel batch processors. Total weighted tardiness on parallel batch machines with incompatible job families and unequal ready times of the jobs is attempt to minimize. Given that the problem is NP hard, a simple heuristic based on the Apparent Tardiness Cost (ATC) Dispatching Rule is suggested. Using this rule, a look-ahead parameter has to be chosen. Because of the appearance of unequal ready times and batch machines it is hard to develop a closed formula to estimate this parameter. The use of inductive decision trees and neural networks from machine learning is suggested to tackle the problem of parameter estimation. The results of computational experiments based on stochastically generated test data are presented. The results indicate that a successful choice of the look-ahead parameter is possible by using the machine learning techniques.     

Investigation of performance variations due to the amplitude of group-delay ripple in chirped fiber Bragg gratings

We measure the system impacts due to the amplitude of group-delay (GD) ripple in single and cascaded chirped fiber Bragg gratings (CFBGs). Signals with smaller pulse width result in smaller performance variation at the same data rate. A 65-ps peak-to-peak GD ripple induces 0.9, 1.7, and 2.7 dB maximum penalties for 10, 20, and 40-Gb/s, respectively. We also find that cascading gratings with random ripple causes much less degradation than cascading gratings with the same ripple profile.