A Two-Level Spreading-despreading CDMA System and Its Performance Evaluation

1　IntroductionHowtosuppresstheinterferenceintheCDMAsystems,includingtheSelfInterference(SI) ,Mul tipleAccessInterference(MAI)andtheAdjacentCellInterference(ACI) ,isthekeypointinimprov ingthesystemperformanceandcapacity .Insteadofthecomplicatedspecializedsignalprocessingtech niquesusedbefore[1～ 4] ,spreadingsequenceswithgoodcorrelationpropertiescanimprovethesystemperformanceradically[5] .InRef.[6～ 9],theconceptofZeroCorrelationZone (ZCZ) ,whichisequivalenttothegeneralizedothogonal…     

Performance of a turbo‐coded CDMA system in a mobile satellite channel

The bit error rate (BER) performance of a turbo‐coded code‐division multiple‐access (CDMA) system operating in a satellite channel is analysed and simulated. The system performance is compared for various constituent decoders, including maximum a posteriori probability (MAP) and Max‐Log‐MAP algorithms, and the soft‐output Viterbi algorithm. The simulation results indicate that the Max‐Log‐MAP algorithm is the most promising among these three algorithms in overall terms of performance and complexity. It is also shown that, for fixed code rate, the BER performance is improved substantially by increasing the number of iterations in the turbo decoder, or by increasing the interleaver length in the turbo encoder. The results in this paper are of interest in CDMA‐based satellite communications applications. Copyright © 2005 John Wiley & Sons, Ltd.     

Delay-insensitive codes — an overview

The problem of delay-insensitive data communication is described. The notion of delay-insensitive code is defined, giving precise conditions under which delay-insensitive data communication is feasible. Examples of these codes are presented and analyzed. It appears that delay-insensitive codes are equivalent with antichains in partially ordered sets and with all unidirectional error-detecting codes. Tom Verhoeff received the B.S. and M.S. degrees in mathematics from Eindhoven University of Technology, The Netherlands, in 1985. He is currently an Assistant Professor at the Department of Mathematics and Computing Science of the same university. His main research interests are parallel computations, especially formalisms for their specification and design, and their implementation as delay-insensitive VLSI circuits.     

Evaluation codes at singular points of algebraic differential equations

We use the special geometry of singular points of algebraic differential equations on the affine plane over finite fields to study the main features and parameters of error correcting codes giving by evaluating functions at sets of singular points. In particular, one gets new methods to construct codes with designed minimum distance. This work was partially supported by MCyT BFM2001-2251.     

Using SPIN to Analyse the Tree Identification Phase of the IEEE 1394 High-Performance Serial Bus (FireWire) Protocol

We describe how the tree identification phase of the IEEE 1394 high-performance serial bus (FireWire) protocol is modelled in Promela and verified using SPIN. The verification of arbitrary system configurations is discussed. Received July 2001/Accepted in revised form November 2002 Correspondence and offprint requests to: Alice Miller, Department of Computing Science, University of Glasgow, 17 Lilybank Gardens, Glasgow G12 8QQ, UK. Email: alice@dcs.gla.ac.uk     

掺杂WRe3、WRe25合金的高温电阻－温度特性

本文报导了采用一种新型高温陶瓷发热体高温管状炉，通以氩气保护，测量ＷＲｅ合金丝的电阻－温度（１６００℃）特性试验方法，该方法较真空炉简便、实用且试验费用低而准确，测量数据与美国研究报导一致。     

Introductory Paper

In today’s competitive market designing of digital systems (hardware as well as software) faces tremendous challenges. In fact, notwithstanding an ever decreasing project budget, time to market and product lifetime, designers are faced with an ever increasing system complexity and customer expected quality. The above situation calls for better and better formal verification techniques at all steps of the design flow. This special issue is devoted to publishing revised versions of contributions first presented at the 12th Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) held 21–24 October 2003 in L’Aquila, Italy. Authors of well regarded papers from CHARME’03 were invited to submit to this special issue. All papers included here have been suitably extended and have undergone an independent round of reviewing.