Dynamic Tag Reduction for Low-Power Caches in Embedded Systems with Virtual Memory

This paper presents a low-power tag organization for physically tagged caches in embedded processors with virtual memory support. An exceedingly small subset of tag bits is identified for each application hot-spot so that only these tag bits are used for cache access with no performance sacrifice as they provide complete address resolution. The minimal subset of physical tag bits is dynamically updated following the changes in the physical address space of the application. Operating system support is introduced in order to maintain the reduced tags during program execution. Efficient algorithms are incorporated within the memory allocator and the dynamic linker in order to achieve dynamic update of the reduced tags. The only hardware support needed within the I/D-caches is the support for disabling bitlines of the tag arrays. An extensive set of experimental results demonstrates the efficacy of the proposed approach.     

导弹轨上参数测量的技术实现

介绍了一种利用光电探测器、玻璃微珠原向反射片和数字存储器等高新技术,实现了导弹在发射筒中运动的位移-时间曲线和速度-时间曲线,并由此获得导弹的弹动时刻、离轨时刻和出筒时刻;阐述了功能结构和基于VC平台下的软硬件的实现过程,实验结果表明,该测量系统运行稳定可靠,测量精度高,解决了在大冲力、强温环境下的数据录取工作,对确保导弹轨上参数的有效录取起到了至关重要的作用.     

Win32进程间信息共享的实现方法研究

Microsoft Win32 API为应用程序提共了用于通信和共享数据的进程间通信的机制.探讨了进程间通信的含义及相应的实现技术,对这些技术的原理、特性等进行了分析研究,编制了简单易懂的例程,并结合科研项目研究通过实验室仿真验证实现了进程间的有效通信.     

Store Atomicity for Transactional Memory

We extend the notion of Store Atomicity [Arvind and Jan-Willem Maessen. Memory model = instruction reordering + store atomicity. In ISCA '06: Proceedings of the 33rd annual International Symposium on Computer Architecture, 2006] to a system with atomic transactional memory. This gives a fine-grained graph-based framework for defining and reasoning about transactional memory consistency. The memory model is defined in terms of thread-local Instruction Reordering axioms and Store Atomicity, which describes inter-thread communication via memory. A memory model with Store Atomicity is serializable: there is a unique global interleaving of all operations which respects the reordering rules and serializes all the operations in a transaction together. We extend Store Atomicity to capture this ordering requirement by requiring dependencies which cross a transaction boundary to point in to the initiating instruction or out from the committing instruction. We sketch a weaker definition of transactional serialization which accounts for the ability to interleave transactional operations which touch disjoint memory. We give a procedure for enumerating the behaviors of a transactional program—noting that a safe enumeration procedure permits only one transaction to read from memory at a time. We show that more realistic models of transactional execution require speculative execution. We define the conditions under which speculation must be rolled back, and give criteria to identify which instructions must be rolled back in these cases.     

OpenCMP：一个支持事务存储模型的多核处理器模拟器

CPU设计正在由仅开发指令级并行性的单线程单核结构转向利用线程级并行性的多线程多核结构，但至今还没有一个可移植性好并被广泛使用的开源多核处理器模拟器，限制了在这样的结构上开展高质量的研究工作。我们开发了一个多核处理器体系结构模拟器OpenCMP，用于支持当前和未来对多线程多核处理器体系结构关键技术的研究。该模拟器适当地抽象了多核处理器结构，为主流的多核处理器结构研究提供一个可扩展、灵活的模拟工具框架，包括支持对乱序、顺序的处理器核和同时多线程处理器核的模拟，以便对更大的多核设计空间进行比较性研究。本文以支持事务存储模型的多核处理器结构模拟器为例，详细描述了如何通过抽象多核结构和事务存储模型的最基本特性和组成部分，扩展单核处理器模拟器SimpleScalar，设计与实现一个多核处理器模拟器。初步研究表明，与现有的多核处理器模拟器相比，该模拟器能够较好地支持对事务存储模型和基于事务存储模型的多核处理器体系结构的研究．     

自动抄表系统集中器的设计

介绍了自动抄表系统中集中器的硬件设计，该集中器功能完整，接口丰富。集中器与采集器或电表之间采用电力线载波通信的方式。选用PLCi363载波芯片作为电力线载波通信Modem芯片；集中器与主站之间采用无线传输方式，选用RS232接口或RS485接口与GPRS模块连接，利用GPRS无线传输提高了数据传输速度，节约了整个系统的成本。     

存储器地址线断路故障检测方法的改进

在各种单片机应用系统中，存储器的自检可有效地避免其不正常工作给系统带来的损害。介绍了存储器地址线发生断路故障检测的一般方法，并且提出了一种新的改进措施。     

XML数据查询的并行算法

目前已经提出了多种查询XML数据的方法,然而这些传统的方法不能充分利用多处理器和多核心处理器的优势。本文提出了一种XML查询的并行算法,大幅提高了共享存储器多处理器、多核心处理器系统中XML数据的查询效率。     

基于MPC860启动引导程序研究与设计

启动引导程序是嵌入式程序的开头部分,它负责ES860的硬件初始化,载入操作系统内核,向内核传递参数信息,并将控制转交给内核,然后由内核软件再初始化操作系统,从而实现整个系统的启动;文中通过对Linux引导程序工作原理和机制的分析,介绍了在嵌入式Linux系统下基于MPC860的启动引导程序的设计方法,分析了CPU、存储器、ES860的初始化过程,结合对引导程序Uboot的源代码讨论,提出了一个在ES860开发平台上实现的引导程序,对引导过程的第一阶段和第二阶段以及相应的源程序都作了详细的分析,对源程序的调试和固化过程也作了简要讨论.