一种新型的视觉计算机

视觉信息处理可以看作是从三维环境的图象中抽取、描述和解释信息的过程.根据该过程所涉及的方法和技术的复杂性,可将它们分成三个处理层次:低层视觉,中层视觉和高层视觉.作者根据各个层次视觉处理的要求和特点,提出分别采用基于DSP的低层视觉处理模块,中层视觉处理模块——PIPE以及高层视觉处理模块——并行图归约机(PGR).它们共用一个工作平台IBMPC,组成混合型视觉计算机.这可能是解决视觉信息处理复杂、数据量大以及实时要求高等问题的有效方法.     

用于流水线A/D转换器的改进型数字自校准算法

数字自校准算法在高精度流水线ADC中应用越来越广泛.目前,基于数字自校准算法的流水线ADC的结构一般都是1.5位/级.基于对各种结构优缺点的分析,选择在芯片功耗和面积方面有很强优势的2位/级结构,并设计了一种符合这种结构的改进型数字自校准算法.这种改进算法解决了目前数字自校准算法中校准参数不准确的问题,使校准输出后的数据准确度更高.实验结果表明,该改进型数字自校准算法使系统的线性度有了很大的提升.     

High-throughput architecture for post-quantum DME cryptosystem

Quantum computers have the potential to solve difficult mathematical problems efficiently, therefore meaning an important threat to Public-Key Cryptography (PKC) if large-scale quantum computers are ever built. The goal of Post-Quantum Cryptography (PQC) is to develop cryptosystems that are secure against both classical and quantum computers. DME is a new proposal of quantum-resistant PKC algorithm that was presented for NIST PQC Standardization competition in order to set the next-generation of cryptography standards. DME is a multivariate public key, signature and Key Encapsulation Mechanism (KEM) system based on a new construction of the central maps, that allows the polynomials of the public key to be of an arbitrary degree. In this paper, a high-throughput pipelined architecture of DME is presented and hardware implementations over Xilinx FPGAs have been performed. Experimental results show that the architecture here presented exhibits the lowest execution time and highest throughput when it is compared with other PQC multivariate implementations given in the literature.     

一种实现网络入侵检测的高效算法及其实现架构

为了实现网络入侵检测系统中的精确字符串匹配,本文提出了一种基于叶子-附加和二叉搜索树的字符串匹配算法及其实现架构;首先采用叶子-追加算法来对给定的模式集进行处理,以消除模式之间的重叠。然后采用二叉搜索树算法提取叶子模式及其匹配向量来构建二叉搜索树,并根据每个节点的比较结果,通过左遍历或右遍历来实现字符串的精确匹配;为了进一步提高字符串匹配算法的内存效率,提出了级联二叉搜索树;最后給出了实现精确字符串匹配的总体架构和各个功能模块的架构;实验结果表明,本文提出的设计不仅在内存效率和吞吐量方面优于目前先进的设计技术,而且具有灵活的可扩展性。     

Design of novel SMS4-BSK encryption transmission system

In our day-to-day life, securing the confidential data and communicating the same to the authorized receiver are the biggest challenges. In Defense, Medical and Banking domains, the security over wireless medium should be high. SMS4-BSK is designed to provide a faster encryption with the required security over Wireless Local Area Network (WLAN). A novel SMS4-BSK architecture is proposed in this paper. The new design is implemented in Kintex 7 FPGA and it is proved that the new architecture can perform encryption and decryption faster than the existing SMS4 architectures. The proposed cryptosystem is capable of resisting cryptanalysis over Ciphertext-only attack, Known-plaintext attack, Chosen-plaintext attack, and Chosen-ciphertext attack. Finally, the possible ways of changes that can be made for improving speed are discussed.     

A nonlinearity error calibration technique for pipelined ADCs

This paper presents a digital background calibration technique that measures and cancels offset, linear and nonlinear errors in each stage of a pipelined analog to digital converter (ADC) using a single algorithm. A simple two-step subranging ADC architecture is used as an extra ADC in order to extract the data points of the stage-under-calibration and perform correction process without imposing any changes on the main ADC architecture which is the main trend of the current work. Contrary to the conventional calibration methods that use high resolution reference ADCs, averaging and chopping concepts are used in this work to allow the resolution of the extra ADC to be lower than that of the main ADC.     

一种流水线结构A／D转换器的设计

介绍了一种适于数字ＣＭＯＳ工艺实现的优化流水线结构Ａ／Ｄ转换器的设计。并从如何减少误差来源，消除误差影响，减小电路设计难度等方面对该结构进行了详细分析。公式论证和仿真结果表明，采用该方案可实现２０ＭＨｚ工作频率和１０位分辨率的高速高精度、低功耗Ａ／Ｄ转换器。     

Query processing techniques for arrays

Arrays are a common and important class of data. At present, database systems do not provide adequate array support: arrays can neither be easily defined nor conveniently manipulated. Further, array manipulations are not optimized. This paper describes a language called the Array Manipulation Language (AML), for expressing array manipulations, and a collection of optimization techniques for AML expressions. In the AML framework for array manipulation, arbitrary externally-defined functions can be applied to arrays in a structured manner. AML can be adapted to different application domains by choosing appropriate external function definitions. This paper concentrates on arrays occurring in databases of digital images such as satellite or medical images. AML queries can be treated declaratively and subjected to rewrite optimizations. Rewriting minimizes the number of applications of potentially costly external functions required to compute a query result. AML queries can also be optimized for space. Query results are generated a piece at a time by pipelined execution plans, and the amount of memory required by a plan depends on the order in which pieces are generated. An optimizer can consider generating the pieces of the query result in a variety of orders, and can efficiently choose orders that require less space. An AML-based prototype array database system called ArrayDB has been built, and it is used to show the effectiveness of these optimization techniques. Edited by M. Carey. Received: 10 August 2001 / Accepted: 11 December 2001 Published online: 24 May 2002     

Modelling and analysis of pipelined circuit switching in interconnection networks with bursty traffic and hot-spot destinations

Pipelined circuit switching (PCS) that combines the advantages of both circuit switching and wormhole switching is an efficient method for passing messages in interconnection networks. Analytical modelling is a cost-effective tool and plays an important role in achieving a clear understanding of the network performance. However, most of the existing models for PCS are unable to capture the realistic nature of message behaviours generated by real-world applications, which have a significant impact on the design and performance of communication networks. This paper presents a new analytical model for PCS in interconnection networks in the presence of bursty and correlated message arrivals coupled with hot-spot destinations, which can capture the bursty message arrival process and non-uniform distribution of message destinations. Such a traffic pattern has been found in many practical communication environments. The accuracy of the proposed analytical model is validated through extensive simulation experiments. The model is then applied to investigate the effects of the bursty message arrivals and hot-spot destinations on the performance of interconnection networks with PCS.     

Pipelined functional link artificial recurrent neural network with the decision feedback structure for nonlinear channel equalization

This paper presents a computationally efficient nonlinear adaptive filter by a pipelined functional link artificial decision feedback recurrent neural network (PFLADFRNN) for the design of a nonlinear channel equalizer. It aims to reduce computational burden and improve nonlinear processing capabilities of the functional link artificial recurrent neural network (FLANN). The proposed equalizer consists of several simple small-scale functional link artificial decision feedback recurrent neural network (FLADFRNN) modules with less computational complexity. Since it is a module nesting architecture comprising a number of modules that are interconnected in a chained form, its performance can be further improved. Moreover, the equalizer with a decision feedback recurrent structure overcomes the unstableness thanks to its nature of infinite impulse response structure. Finally, the performance of the PFLADFRNN modules is evaluated by a modified real-time recurrent learning algorithm via extensive simulations for different linear and nonlinear channel models in digital communication systems. The comparisons of multilayer perceptron, FLANN and reduced decision feedback FLANN equalizers have clearly indicated the convergence rate, bit error rate, steady-state error and computational complexity, respectively, for nonlinear channel equalization.