研华工控在生产调度监测系统中的应用

本文介绍了利用研华工控产品实现工业生产调度集中监测以及系统所具的功能、特点。     

氯碱生产中氯气事故的KMM智能控制

鉴于氯碱化工生产中，防止跑氯事故发生的重要性，传统的继电器线路控制难以确保可靠性。介绍了利用KMM先进的控制功能，进行适当组态、编程、达到其可靠控制的目的。     

Conductivity modulation enhanced lateral IGBT with SiO2 shielded layer anode by SIMOX technology on SOI substrate

New Lateral IGBT with SiO2 shielded layer anode on SOI substrate is proposed and discussed. Compared to the conventional LIGBT, the proposed device offers a conductivity modulation enhanced effect due to the SiO2 shielded layer anode structure which can be formed by SIMOX technology. Simulation results show that, for the proposed LIGBT, during conducting state, the electron-hole plasma concentrations in n-drift region are several times larger than that of conventional LIGBT; the conducting current is up to 37% larger than that of conventional one. The SiO2 shielded layer anode conductivity modulation enhanced effect do not sacrifice other characteristics of device, such as breakdown and switching, but is compatible to other optimized technologies.     

超薄柔性硅CMOS器件及无源元件性能退化仿真研究

基于150 mm 0.35μm CMOS工艺,利用Silvaco TCAD软件,针对50μm厚硅基上NMOS与PMOS器件、多晶硅-介电层-多晶硅(PIP)电容和N⁺型多晶硅电阻,在单轴状态不同弯曲半径下,仿真了压缩与拉伸对器件电学参数变化的影响程度。结果表明,单轴拉伸与压缩弯曲使NMOS的阈值电压最大漂移0.46 mV,使PMOS阈值电压最大漂移0.33 mV。漏极电流随变形量线性变化,NMOS压缩时系数为-0.132 95,NMOS拉伸时系数为0.006 01。PMOS拉伸时系数为-0.104 47,PMOS压缩时系数为-0.110 7。电阻阻值随变形量呈线性变化,当掺杂浓度分别为1×10¹⁹,2×10¹⁹,3×10¹⁹,4×10¹⁹,5×10¹⁹时,系数分别为247,498,766,1 016,1 301。电容最大变化值和初始值不超过0.5%,结论归纳为无失配影响。这些结果与实验吻合,验证了模型的正确性,为研制降低退化的柔性硅基集成电路打下基础。     

一种隐埋缓冲掺杂层高压SBD器件新结构

提出了一种新型隐埋缓冲掺杂层(IBBD)高压SBD器件,对其工作特性进行了理论分析和模拟仿真验证。与常规高压SBD相比,该IBBD-SBD在衬底上方引入隐埋缓冲掺杂层,将反向击穿点从常规结构的PN结保护环区域转移到肖特基势垒区域,提升了反向静电释放(ESD)能力和抗反向浪涌能力,提高了器件的可靠性。与现有表面缓冲掺杂层(ISBD)高压SBD相比,该IBBD-SBD重新优化了漂移区的纵向电场分布形状,在保持反向击穿点发生在肖特基势垒区域的前提下,进一步降低反向漏电流、减小正向导通压降,从而降低了器件功耗。仿真结果表明,新器件的击穿电压为118 V。反向偏置电压为60 V时,与ISBD-SBD相比,该IBBD-SBD的漏电流降低了52.2%,正向导通电压更低。     

浅谈超长桩基灌注桩施工技术

本文从阐述超长桩基灌注桩施工技术要点入手,对超长桩基灌注桩施工的质量控制措施进行了分析。     

超薄顶硅层SOI基新颖阳极快速LIGBT北大核心CSCD

提出一种利用浅槽隔离(STI)技术的超薄顶硅层绝缘体上硅(SOI)基新颖阳极快速横向绝缘栅双极型晶体管(LIGBT),简称STI-SOI-LIGBT。该新结构器件整体构建在顶硅层厚度为1μm、介质层厚度为2μm的SOI材料上,其阳极采用STI和p+埋层结构设计。新器件STI-SOI-LIGBT的制造方法可以采用半导体工艺生产线常用的带有浅槽隔离工艺的功率集成电路加工技术,关键工艺的具体实现步骤也进行了讨论。器件+电路联合仿真实验说明:新器件STISOI-LIGBT完全消除了正向导通过程中的负微分电阻现象,与常规结构LIGBT相比,正向压降略微增加6%,而关断损耗大幅降低86%。此外,对关键参数的仿真结果说明新器件还具有工艺容差大的设计优点。新器件STI-SOI-LIGBT非常适用于SOI基高压功率集成电路。     

A novel lateral IGBT with a controlled anode for on-off-state loss trade-off improvement

New Lateral Insulated-Gate Bipolar Transistor with a Controlled Anode (CA-LIGBT) on Silicon-On-Insulator (SOI) substrate is reported. Benefiting by both of enhanced conductivity modulation effect and high resistance controlled electron extracting path, CA-LIGBT has faster turn-off speed and lower forward drop, and the trade-off between off-state and on-state losses is better than that of state-of-the-art 3-D NCA-LIGBT we presented earlier. As simulation results shown, the ratios of Figure of Merit (FOM) for CA-LIGBT comparing to that of 3-D NCA-LIGBT and conventional LIGBT are 1.45:1 and 59.53:1, respectively. And, the new devices can be created by using an additional Silicon Direct Bonding (SDB). So, from power efficient point of view, the proposed CA-LIGBT is a promised device used in power IC's.     

一种基于SOI基的N区控制阳极LIGBT新结构

A new lateral insulated-gate bipolar transistor （LIGBT） structure on SOI substrate, called an n-region controlled anode LIGBT （NCA-LIGBT）, is proposed and discussed. The n-region controlled anode concept results in fast switch speeds, efficient area usage and effective suppression NDR in forward I-V characteristics. Simulation results of the key parameters （n-region doping concentration, length, thickness and p-base doping concentration） show that the NCA-LIGBT has a good tradeoff between turn-off time and on-state voltage drop. The proposed LIGBT is a novel device for power ICs such as PDP scan driver ICs.     

700V三层RESURF nLDMOS优化设计

提出了一种利用高能离子注入形成的700 V三层RESURF结构nLDMOS.与双RESURF结构漂移区表面注入形成P-top层不同,三层RESURF结构在漂移区内部形成P型埋层,漂移区表面保留一条N型导电通路,导通电阻有所降低.利用Sentaurus TCAD仿真软件,分析各参数对器件击穿电压和导通电阻的影响.与普通单RESURF和双RESURF结构相比,三层RESURF LDMOS器件的优值(FOM)得到提高,三种结构的优值之比为1∶1.75∶2.03.