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超高速宽带信号取样——滤波数字化机理 总被引:4,自引:0,他引:4
本文首先分析了取样-保持器和闪烁式ADC用于动态模拟信号数字化时最高频率受限的主要原因。然后重点阐述了近年来在国外出现的超高速宽带信号取样-滤波数字化机理和实现方案,证明了高斯滤波器的一项重要特性。将这种技术用于超高速交替式数据采集系统中,信号的实时取样速率目前已达10Gsa/S。 相似文献
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一种基于高斯滤波器的电能质量信号去噪算法 总被引:4,自引:0,他引:4
研究电能质量问题有重要的意义。电能质量分析的必要前提是对采集到的电能质量信号进行有效的去噪处理,同时,保留突变点信息也是电能质量分析的一个重点。为了解决传统的滤波方法不能同时解决去噪和突变点信息保留这对矛盾的问题,该文提出了一种基于高斯滤波器的电能质量去噪算法。通过使用导数函数调整其尺度参数σ从而进一步调整滤波器的加权系数,使其既能平滑噪声又能较完整地保留突变点的信息。实验仿真结果表明,该文算法在去噪效果和突变点保留能力上均优于传统的滤波方法,选取σ约为所有点导数的均值时处理效果最佳。该文算法理论基础完善,易于实现,处理效果显著,有良好的发展前景。 相似文献
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介绍一种新型全数字GMSK调制实现算法及其实现结构,实现在线更新调制参数功能,在仪器仪表应用中具有很高的实用价值。在传统数字实现结构中往往直接包含数字高斯滤波器和数字相位积分器,因此调制过程中避免不了会产生各种截取误差,影响调制精度。新型算法的实现充分利用了DSP的计算功能和计算速度,在DSP内部实现高斯滤波及相位积分,避免了传统数字实现结构中的各种截取误差,并实现在线更新FPGA内部调制查找表数据的功能。理论分析和实验结果表明新型算法及其实现结构能有效的估计调制误差并提高调制精度。 相似文献
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J. Fernández‐Berni R. Carmona‐Galán 《International Journal of Circuit Theory and Applications》2012,40(8):859-876
This paper addresses the design and VLSI implementation of MOS‐based RC networks capable of performing time‐controlled Gaussian filtering. In these networks, all the resistors are substituted one by one by a single MOS transistor biased in the ohmic region. The design of this elementary transistor is carefully realized according to the value of the ideal resistor to be emulated. For a prescribed signal range, the MOSFET in triode region delivers an interval of instantaneous resistance values. We demonstrate that, for the elementary 2‐node network, establishing the design equation at a particular point within this interval guarantees minimum error. This equation is then corroborated for networks of arbitrary size by analyzing them from a stochastic point of view. Following the design methodology proposed, the error committed by an MOS‐based grid when compared with its equivalent ideal RC network is, despite the intrinsic nonlinearities of the transistors, below 1% even under mismatch conditions of 10%. In terms of image processing, this error hardly affects the outcome, which is perceptually equivalent to that of the ideal network. These results, extracted from simulation, are verified in a prototype vision chip with QCIF resolution manufactured in the AMS 0.35µm CMOS‐OPTO process. This prototype incorporates a focal‐plane MOS‐based RC network that performs fully programmable Gaussian filtering. Copyright © 2011 John Wiley & Sons, Ltd. 相似文献
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