基于滑模-模糊逻辑系统的故障检测及容错控制

针对一类单输入单输出非线性不确定系统,提出了一种基于滑模-模糊逻辑系统的故障检测的方法。其中,利用模糊逻辑系统对被控对象中的未知函数进行逼近,用相同方法对故障项进行逼近;设计滑模观测器进行故障检测和诊断,然后基于Lyapunov函数综合设计方法对系统进行稳定性分析;当故障被检测出后,为保证系统稳定性重组控制器,设计控制器,实现容错控制。仿真结果验证了该方法的有效性。     

基于分布式对象封装的集成SMS报警控制系统模型研究*

针对监控系统中对设备的远程报警和控制上存在的异网、异构等问题,提出在分布式监控平台中引入短信息服务(SMS)分布式服务体系的设计理念来建立远程监视控制系统,给出了网络化SMS体系的监控系统功能模块结构和工作程序流程,同时采用CORBA服务组冗余等容错策略来提高系统的可靠性.另外,系统中的分布式监控模块将各种监控平台逐一封装为CORBA对象,可用于分布式子系统的无缝透明连接.     

ARINC 659容错数据总线测试验证系统研制

研制了具有自主知识产权的自带微处理器的ARINC 659总线接口芯片,开发了接口芯片内微处理器的帧描述语言编译器;设计开发了总线接口板、通信试验台等,构建了总线通信测试验证系统.按ARINC 659总线规范要求对各实现功能进行了软、硬件联合调试和测试,测试结果验证了接口芯片、通信测试验证系统功能的正确性和完整性.研究成果已用于某些航空安全关键系统,提高了系统的可靠性,降低了全寿命周期费用.     

密集传感器网络中节点随机调度算法研究

对于密集型传感器网络,节点交替工作能有效地延长网络的生命周期。该文基于Cover的随机节点调度算法进行深入分析,首先给出k-覆盖网络中覆盖强度的定义,并利用基本概率理论估计k-覆盖网络的覆盖强度;然后分析2-覆盖网络中节点密度、覆盖强度以及能量节省水平之间的关系(即部署节点个数n和2-覆盖网络的覆盖强度Cn2以及划分COVER个数c)。该文研究工作对部署容错性较高的能量有效性传感器网络具有一定的指导意义。     

分布式系统中基于主/副版本的实时容错调度综述

对分布式系统中基于主/副版本技术的实时容错调度算法进行了归纳和总结,从主/副版本执行的关系、任务的调度方式以及调度环境等各个方面深入分析和比较了近年来基于主/副版本的实时容错调度算法,并指出它们各自的优缺点和适应环境。最后指出了本研究领域的未来研究发展方向。     

可重构计算在提高数据采集系统容错中的应用

可重构计算技术在数据采集系统中的应用越来越广泛,这不仅得益于可重构计算技术能够更快的对数据进行处理、降低系统能耗,还得益于其可以提高系统的可靠性。该文介绍了如何利用可重构计算技术,提高数据采集系统的容错能力,使数据采集系统在出现硬件故障时能保持正常工作的能力。     

Fault-tolerance in balanced sorting networks

Much research has been done on sorting networks but there are very few results concerning their robustness. Our starting point is the balanced sorting network introduced by Dowd et al. and its single-block robust design of Rudolph obtained at the cost of some redundancy and two permuters external to the network. In this article we introduce a new implementation which is more robust than Rudolph's network and needs no redundancy or external permuters. We also consider a class of single-stage designs with redundancy and compare the characteristics of networks discussed.     

An Isochronous Testing Strategy for Hierarchical Adaptive Distributed System-Level Diagnosis

Distributed System-level diagnosis allows the fault-free components of a fault-tolerant distributed system to determine which components of the system are faulty and which are fault-free. The time it takes for nodes running the algorithm to diagnose a new event is called the algorithm's latency. In this paper we present a new distributed system-level diagnosis algorithm which presents a latency of O(log N) testing rounds, for a system of N nodes. A previous hierarchical distributed system-level diagnosis algorithm, Hi-ADSD, presents a latency of O(log ² N) testing rounds. Nodes are grouped in progressively larger logical clusters for the purpose of testing. The algorithm employs an isochronous testing strategy that forces all fault-free nodes to execute tests on clusters of the same size each testing round. This strategy is based on two main principles: a tested node must test its tester in the same round; a node only accepts tests according to a lexical priority order. We present formal proofs that the algorithm's latency is at most 2log N – 1 testing rounds and that the testing strategy of the algorithm leads to the execution of isochronous tests. Simulation results are shown for systems of up to 64 nodes.     

容错数字信号处理系统的设计方法及实现

高物可靠性的信号处理对于并行处理器的高速实时应用越来越重要。已知在状态空间模型下线性数字信号处理算法可以表示秋为阵与矢量乘积形式，在该模型下，我们假设同一种运算在主计算过程中具有相同的错误概率，即计算过程是珠，并利用矩阵划分的方法提出一种具有纠错能力的容错设计方案。     

Increasing processor utilization in hard-real-time systems with checkpoints

Often hard real-time systems require results that are produced on time despite the occurrence of processor failures. This paper considers a distributed system where tasks are periodic and each task occurs in multiple copies which are periodically synchronized in order to handle failures. The problem of preemptively scheduling a set of such tasks is discussed where every occurrence of a task has to be completely executed before the next occurrence of the same task. First, a static scheduling algorithm is proposed which uses periodic checkpoints to tolerate processor failures. Then, the performance of the algorithm is substancially improved employing a mixed strategy which constructs a schedule where high frequency tasks are duplicated, and low frequency tasks are periodically checkpointed. The performance of the solution proposed is evaluated in terms of the minimum achievable processor utilization due to the useful computation of the tasks. Moreover, analytical and simulation studies are used to reveal interesting trade-offs associated with the scheduling algorithm. In particular, if high frequency tasks are less than 70 percent of the total number of tasks then the mixed strategy yields a higher processor utilization than the task duplication scheme.