六英寸Si基GaN功率电子材料及器件的制备与研究

氮化镓(GaN)作为第三代半导体材料的代表,具有优异的材料物理特性,更加适合于下一代电力电子系统对功率开关器件更大功率、更高频率、更小体积和更恶劣工作温度的要求。为了兼容Si基CMOS工艺流程,以及考虑到大尺寸、低成本等优势,在Si衬底上进行GaN材料的异质外延及器件制备已经成为业界主要技术路线。详细介绍了在6英寸Si衬底上外延生长的AlGaN/GaN HEMT结构功率电子材料,以及基于6英寸CMOS产线制造Si基GaN功率MIS-HEMT和常关型Cascode GaN器件的相关成果。     

选择区域外延槽栅结构GaN常关型MOSFET的研究

高性能GaN常关型功率开关器件的实现是目前研究的热点。槽栅结构GaN常关型MOSFET以其栅压摆幅冗余度大、栅极漏电流小等优势受到广泛关注。制备槽栅结构GaN常关型MOSFET需要的刻蚀方法会在栅极沟道引入缺陷,影响器件的稳定性。首先,提出选择区域外延方法制备槽栅结构GaN常关型MOSFET,期望避免刻蚀对栅极沟道的损伤;再通过改进选择区域外延工艺(包括二次生长界面和异质结构界面的分离及抑制背景施主杂质),使得二次生长的异质结构质量达到标准异质结构水平。研究结果表明,选择区域外延方法能够有效保护栅极导通界面,使器件具备优越的阈值电压稳定性;同时也证明了选择区域外延方法制备槽栅结构GaN常关型MOSFET的可行性与优越性。     

Zero-static-power nonvolatile logic-in-memory circuits for flexible electronics

Flexible logic circuits and memory with ultra-low static power consumption are in great demand for battery-powered flexible electronic systems.Here,we show that a flexible nonvolatile logic-in-memory circuit enabling normally-off computing can be implemented using a poly(1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane) (pV3D3)-based memristor array.Although memristive logic-in-memory circuits have been previously reported,the requirements of additional components and the large variation of memristors have limited demonstrations to simple gates within a few operation cycles on rigid substrates only.Using memristor-aided logic (MAGIC) architecture requiring only memristors and pV3D3-memristor with good uniformity on a flexible substrate,for the first time,we experimentally demonstrated our implementation of MAGIC-NOT and-NOR gates during multiple cycles and even under bent conditions.Other functions,such as OR,AND,NAND,and a half adder,are also realized by combinations of NOT and NOR gates within a crossbar array.This research advances the development of novel computing architecture with zero static power consumption for batterypowered flexible electronic systems.     

Low Power Computing Paradigms Based on Emerging Non-Volatile Nanodevices

Traditional digital processing approaches are based on semiconductor transistors, which suffer from high power consumption, aggravating with technology node scaling. To solve definitively this problem, a number of emerging non-volatile nanodevices are under intense investigations. Meanwhile, novel computing circuits are invented to dig the full potential of the nanodevices. The combination of non-volatile nanodevices with suitable computing paradigms have many merits compared with the complementary metal-oxide-semiconductor transistor (CMOS) technology based structures, such as zero standby power, ultra-high density, non-volatility, and acceptable access speed. In this paper, we overview and compare the computing paradigms based on the emerging nanodevices towards ultra-low dissipation.