用于电弧检测的电力专用SoC设计

针对传统的电弧电路故障检测结果不准确的问题,设计用于电弧检测的SoC系统,并且在55nm工艺下进行流片验证。采用包含两种结构的模数转换器的片上电压源,设计了锁相环以及复位电路,精度最高可达8.67 bit。验证结果表明,本设计可提高电弧检测的准确性。     

挤出型3D打印混凝土力学性能研究进展

介绍了3D打印混凝土的特点与前景,综述了挤出型工艺的3D打印混凝土的压、拉、折、剪基本力学性能以及增强措施。研究表明:打印层在喷嘴的挤压作用下密实度有所提高,但同时层间易形成薄弱界面,造成性能的各向异性,通过调整胶凝材料、掺入纤维、优化工艺、水浴养护、布筋等措施能有效改善。此外,提出了还需进一步研究的问题。     

Sizing of multi-stage Op Amps by combining design equations with the gm/ID method

Analog integrated circuit design has as integral parts both analytical reasoning and numerical validation in the process from topology construction to sizing. Given a circuit topology, different circuit sizing results can be obtained from different processes of sizing inference. Sizing methods by simulation-based numerical searching have been a continuously studied subject. However, almost all approaches in this category require an overwhelming number of circuit simulations to arrive at an optimized sizing result. On the other hand, many published manual sizing methods by using the conventional device equations also require repeated SPICE simulations to correct the equation-based sizing results. This paper proposes a systematic gm/ID-based initial sizing method specifically customized for designing multiple-stage operational amplifiers (Op Amps). A main feature of the proposal is to use circuit-level design equations as constraints on the gm/ID table lookup method to substantially reduce the uncertainty in the sizing calculations. As a result, a significant amount of SPICE based correction work can be reduced to complete an initial sizing. The proposed sizing procedure includes a few regular sizing rules customized to the configuration of multi-stage Op Amps. We validate the proposed sizing method by application to several multi-stage Op Amp examples with a capacitive load or Miller compensation. Simulations have justified that the produced initial sizing results can achieve most of the prespecified design targets.     

计及RSC控制的DFIG短路电流直流分量解析表达

现有文献针对计及转子变流器(RSC)控制的双馈感应风电机组(DFIG)定子短路电流解析表达,将定子磁链当作一阶直流衰减分量或忽略功率外环控制。基于DFIG电压、磁链和RSC控制方程,得到定子电流关于定子电压和定子功率的传递函数,提出定子电流的精确解析表达式。基于RSC内、外环PI参数关系,推导直流分量衰减时间常数和角频率关于PI参数的表达式。分析了RSC内外环PI参数对定子电流直流衰减分量的影响。仿真结果验证了解析表达式的准确性,为PI参数选取和保护装置测量、整定提供依据。     

基于单片机C8051F500的无刷直流电机控制研究

永磁无刷直流电机是近些年发展起来的一种新型电机,具有效率高、调速性能好、启动转矩大等诸多优点,在运动控制领域中的应用日趋广泛。基于电机专用控制芯片MC33035,采用单片机C8051F500为主控芯片,设计一款无刷直流电机智能控制器,实现对无刷直流电机启动停止、正反转、调速、转速显示等控制。通过简要介绍无刷直流电机工作原理,使用MATLAB/Simulink对控制系统进行建模仿真,对无刷直流电机控制系统进行软、硬件设计。实验结果表明,该控制系统运行稳定,抗干扰性强,具有良好的市场应用价值。     

Modeling and design of 3-D MPPT for ultra low power RF energy harvesters

Radio-Frequency (RF) energy harvesting must cope with the limited availability and high variability of the energy source. In this paper, the modeling of an RF harvester for ultra low power environments is presented. A mathematical model based on theoretical analysis is developed. The model demonstrates that the maximum transferred power point is located in a three-dimensional space defined by the input capacitance, the output voltage, and the load resistance of the rectifier circuit. Moreover, the mathematical model returns results in substantial agreement with the SPICE simulation results, while guaranteeing a remarkable reduction of the required computation time. Furthermore, the paper reports the implementation of a mixed signal system for the 3-D MPPT, to be embedded in an RF harvester, in a 65 nm CMOS technology. The circuit exhibits a simulated power consumption lower than 100 nW, making this solution suitable for ultra low power harvesting.     

氨浸-草酸盐沉淀法回收废弃线路板中金属铜的工艺研究

采用氨浸-草酸盐沉淀法回收废弃线路板中的金属铜,考察了氨水浓度、NH₄Cl溶液浓度、液固比、反应温度和时间对铜浸出率的影响。结果表明,最佳工艺条件为:氨水浓度10%、NH₄Cl溶液浓度1.5 mol/L、液固比10∶1、反应温度60 ℃、反应时间3 h,在此工艺条件下,铜浸出率高达99.25%。在铜的富集过程中,调节溶液pH值至1.5,60 ℃下反应30 min,铜沉淀率达到了98.15%。     

织物表面导电线路喷射打印起始端凸起形成过程研究

为提高织物表面微滴喷射打印导电线路的成形质量,针对导电线路喷射打印过程中线路沉积形貌的起始端凸起现象,利用高速相机对线路成形过程进行采集,研究微滴间融合振荡过程中左右接触角的动态变化,微滴与线路融合以及液体向线路起始端的输送过程,提出线路起始端凸起的消除方案并进行实验。结果表明:在融合振荡过程中,微滴向起始端的振荡趋势始终大于向另一侧的振荡趋势,导致打印线路起始端的织物基板润湿区域不断扩大;微滴与线路接触后,其中一部分液体润湿织物基板拓展线路长度,一部分通过线路以恒定速度输送至起始端,在线路起始端形成凸起;利用抗坏血酸溶液润湿织物表面后,成形线路起始端凸起现象得到消除,整体线路路径均匀,沉积形貌良好。     

废弃电路板电子元件低温脱焊研究

采用低熔点合金融锡法分离废弃电路板上的电子元件,分别以铅锡焊料和无铅焊料电路板为原料研究了温度和保温时间对电子元件分离率的影响,得到铅锡焊料电路板脱焊的优化条件:温度为150℃、保温时间4 min;无铅焊料电路板脱焊的优化条件:温度为180℃、保温时间7 min。在优化条件下,电子元件分离率分别可达到97. 38%和95. 25%。与其它脱焊方法相比,低熔点合金融锡法可有效降低焊料的熔化温度,减轻环境污染,具有显著的优势。     

一种新型回路电阻测试仪的研究与设计

针对传统低压回路电阻测试仪只能在被测设备停电时使用的一大限制,本文提出并设计了一种新型低压回路电阻测试仪。该仪器可在低压设备运行状态下对其回路电阻进行测量,在保证测量精度的前提下减少了设备停电率,大大提高了工作效率。