Negative capacitance independent multi-gate FinFETs and their optimisations

In order to reduce the operating voltage of FinFET and increase the flexibility of integrated circuit design, we have proposed a Negative Capacitance Independent Multi-Gate FinFET (NC-IMG-FinFET) with Ferroelectric-Metal-Insulator-Semiconductor-Insulator (FMISI) structure. Both the device and circuit analysis model of NC-IMG-FinFET are addressed, which are used to analyse the performance parameters of the device (the surface potential, internal gate voltage amplification, Sub-threshold Swing (SS), on-current and leakage) and the performance of a circuit (delay, power consumption, power delay product (PDP)). The simulation model of the NC-IMG-FinFET has been constructed by combining BSIM-IMG model with ferroelectric Landau-Khalatnikov model. The optimisations for ferroelectric film thickness of the NC-IMG-FinFETs are carried out in terms of device characteristics and circuit performances. The simulation results are consistent with the analysis results, indicating that the NC-IMG-FinFET has superior performance compared with the baseline device, in terms of smaller leakage, larger on/off current ratio and smaller SS (38.3 mV/dec at room temperature). Compared with the baseline IMG-FinFET circuits, there is large performance improvement for the NC-IMG-FinFET circuits, in terms of the power consumption and PDP.     

基于一种改进IMMJPDA算法的地面目标跟踪

对地面多目标的跟踪,由于地面目标的高机动性、杂波密集特点以及运动不确定性,交互式多模型联合概率数据关联无疑是一种好的跟踪算法,但是该算法需对与可行联合事件相对应的矩阵进行拆分,随着目标个数的增多,计算量会呈指数增长。为此提出一种基于模糊多门限的交互式多模型联合概率数据关联算法,该算法利用量测与目标的关联概率来替代可行联合事件概率的计算。Monte Carlo仿真结果显示了该算法在现实运动中的可行性和方便性。该算法减少了计算量,又改善性能,利用多模型特点解决了地面目标的高机动性所带来的运动模型匹配问题。     

Review and Perspective of Architecture Development for Dynamic Random Access Memory

Discussed is a review and perspective of architecture, materials and process technology for dynamic random access memory（DRAM） applications. Key challenges of the transistor and capacitor scaling from DRAM will be reviewed. To continue scaling down, multi-gate devices with very thin silicon channels are most promising. Several architectures like Fin-field effect transistor（Fin-FET）, Wafer bonded double gate and silicon on nothing（SON） gate-all-around have been demonstrated with good electrical characteristics. An overview of the evolution of capacitor technology is also presented from the early days of planar poly/insulator/ silicon（PIS） capacitors to the metal/insulator/metal（MIM） capacitors used for today 50 nm technology node and below. In comparing Ta2O5 , HfO2 and Al2 O3 as high-k dielectric for use in DRAM technology, Al2 O3 is found to give a good compromise between capacitor performance and manufacturability used in MIM architecture.     

基于图论的城市河网水系连通方案优选——以清潩河许昌段为例

对于复杂河网水系来说,水系连通方案的选择决定了河道是否有效连通以及各种功能能否得以保障。为了优选最佳水系连通方案,本文以清潩河许昌段为研究对象,借助图论法构建了城市水系河网图模型;考虑多闸联合调度以及各节点水量平衡关系,并利用图模型的邻接矩阵和加权邻接矩阵来描述河网水系对水量的分配作用,进而计算整个河网水系各河段和节点的流量值;以水生态景观面积最大为优选目标,结合河网水量分配关系和水力约束建立了多闸联合调度下的水系连通方案优选模型,优选得到在不同工况下的清潩河许昌段最佳水系连通方案。结果显示,在多数连通方案下河网流量可能会超出流量限值,而优选方案下的河网流量不仅可以满足流量约束、保障河网功能需求,还可有效提高水生态景观面积。     

纳米MOSFET的多栅结构和应变硅纳米线结构

介绍了在进入22 nm技术节点后MOSFET器件的两个发展方向,即多栅结构和应变硅纳米线结构.首先通过分析特征长度与有效栅极数量的关系,表明多栅结构器件可以有效增强栅极对沟道的控制,抑制短沟道效应,接近理想的亚阈值斜率;然后分析了应变对能带结构的影响,从理论上论述了应变沟道可以显著提高载流子迁移率;最后介绍了悬浮硅纳米...     

Status and Trends in Advanced SOI Devices and Materials

提供了一种用于安德鲁反射测量样品制备新方法. 该方法采用聚焦粒子束刻蚀和磁控溅射,可以获得可控的、干净的、无应力的纳米接触用于自旋极化探测. 所制备的样品中,磁性和非磁性材料样品的反射谱都表现出复杂的峰和谷结构,这些结构可能源于与界面相关的零偏压反常以及与激发态相关的准离子相互作用. 对另一个Co40Fe40B20合金样品采用简单的钕针尖压针方法进行了对比性测量,反射谱中没有观察到谷结构,但谱结构出现较明显的热扩展,这种热扩展可能来源于界面处的非弹性输运. 所有的反射谱目前还不能由现有的理论给出令人满意的解释. 利用点接触反射方法获得可靠的自旋极化信息还有赖于接触界面特征的进一步分析. 而一个更切合实际的、更完善的理论成为迫切的需要.     

多栅GaAs MESFET开关

论述多栅开关的结构和特点。开关设计中需要考虑的一个重要因素是提高开关功率处理能力的同时减小插损 ,多栅开关由于其特殊的结构 ,很好地解决了这一问题。采用多栅结构 ,设计的移动通讯用 DPDT开关在 DC-2 GHz:IL<0 .75 d B,ISO>1 3 d B,VSWR<1 .5 ,P- 1 >1 0 W。开关芯片面积小、成品率高、封装成本低 ,适宜批量生产 ,并已在手机上试装成功。     

多注射头集成电路(IC)塑封模具的研制

针对传统单、双注射头塑封模具存在的流道长不易注满型腔,塑封料需要预热,更换模盒麻烦等缺陷,设计开发出一种新型的多注射头塑封模具,并以电子产品PC817为例,重点介绍了塑封模具总体结构、模盒、注射系统和注射板平衡设计的技术要点。     

Vertical ultrathin-channel multi-gate MOSFETs (MuGFETs): technological challenges and future developments

One of the biggest challenges for the VLSI circuits with 32-nm-technology nodes and beyond is to prevent catastrophic increases in power consumption due to short-channel effects. Vertical ultrathin-channel (UTC) multi-gate MOSFETs (MuGFETs) have a promising potential to overcome this issue thanks to their superior SCE immunity due to extremely high electrostatic control of the channel. Before we put vertical UTC MuGFETs to practical use, however, we have to solve several technological problems due to the vertical configuration of the channel. This paper discusses the advantages and challenges of vertical UTC MuGFETs and speculates about their future development. Copyright © 2009 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Status and Trends in Advanced SOI Devices and Materials

A review of recently explored effects in advanced SOI devices and materials is given. The effects of key device parameters on the electrical and thermal floating body effects are shown for various device architectures.Recent advances in the understanding of the sensitivity of electron and hole transport to the tensile or compressive uniaxial and biaxial strains in thin film SOI are presented. The performance and physical mechanisms are also addressed in multi-gate Si, SiGe and Ge MOSFETs. New hot carrier phenomena are discussed. The effects of gate misalignment or underlap,as well as the use of the back gate for charge storage in double-gate nanodevices and of capacitorless DRAM are also outlined.