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1.
在系统中集成超宽带(UWB)收发机芯片用于支持室内定位正成为移动通信终端技术发展的一个重要趋势.在超宽带收发机中,低噪声放大器(LNA)是一个核心功能模块.超宽带的全频段(3.1~10.6 GHz)覆盖要求给低噪声放大器的设计带来了巨大挑战,尤其是需要在宽带匹配及在带内维持平坦的噪声系数的情况下.传统的低噪声放大器架构应用在超宽带设计时,噪声、增益和输入匹配之间存在较明显的性能折中关系,因此无法达到良好的综合性能指标要求.本文采用基于变压器反馈的输入匹配的第一级架构和多功能第二级输出驱动结构,实现了平坦的噪声系数和高增益等性能.基于TSMC 65 nm工艺设计的电路仿真结果表明,该低噪声放大器在3.1~10.6 GHz全频段内,可实现输入匹配S_(11)-10 dB,增益17 dB,噪声系数2.71±0.28 dB,1-dB压缩点-17.5 dBm等指标,电路整体功耗为32.8 mW.因此,综合性能Ⅰ(FoM-Ⅰ)和综合性能Ⅱ(FoM-Ⅱ)分别可达2.32和0.41.  相似文献   
2.
《Microelectronics Journal》2015,46(2):198-206
In this paper, a highly linear CMOS low noise amplifier (LNA) for ultra-wideband applications is presented. The proposed LNA improves both input second- and third-order intercept points (IIP2 and IIP3) by canceling the common-mode part of all intermodulation components from the output current. The proposed LNA structure creates equal common-mode currents with the opposite sign by cascading two differential pairs with a cross-connected output. These currents eliminate each other at the output and improve the linearity. Also, the proposed LNA improves the noise performance by canceling the thermal noise of the input and auxiliary transistors at the output. Detailed analysis is provided to show the effectiveness of the proposed LNA structure. Post-layout circuit level simulation results using a 90 nm RF CMOS process with Spectre-RF reveal 9.5 dB power gain, -3 dB bandwidth (BW−3dB) of 8 GHz from 2.4 GHz to 10.4 GHz, and mean IIP3 and IIP2 of +13.1 dBm and +42.8 dBm, respectively. The simulated S11 is less than −11 dB in whole frequency range while the LNA consumes 14.8 mW from a single 1.2 V power supply.  相似文献   
3.
The rising internet-of-things applications in home automation, smart wearables, healthcare monitoring demand small, area efficient, high-performance and low power radio frequency (RF) blocks for effective short-range communication. This growing market demand is addressed in this paper by proposing a fully CMOS radio frequency front-end (RFE) exploiting bulk effect. Apart from the primary function of frequency translation, proper circuit performance concerning the linearity, conversion gain, and noise figure is required for low-cost densely integrated transceivers operating in the 2.4 GHz ISM band. The proposed RFE at 2.4 GHz is designed and implemented in UMC 180 nm CMOS process technology with two modes of operation. In high gain mode (Mode-I), the post-layout simulation with SpectreRF shows a peak gain of 30.06 dB, IIP2 at 64.52 dBm, IIP3 at −2.74 dBm and a DSB-NF of 7.68 dB while consuming only 9.24 mW from the 1.8 V supply. In the high linear mode (Mode-II), the RFE achieves a higher IIP3 of 10.78 dBm, IIP2 of 91.56 dBm, the conversion gain of 23.5 dB, DSB-NF of 9.46 dB while consuming a low power of 3.6 mW. The fully CMOS circuit occupies a core area of only 0.0021 mm2. The proposed front-end exhibits a spurious free dynamic range (SFDR) of 81.18 dB ensuring the high dynamic operation of the wireless system.  相似文献   
4.
In this paper, a low-power low-noise complementary metal-oxide semiconductor (CMOS) receiver RF front-end (RFFE) that employs a current-reuse Q-boosted resistive feedback low-noise amplifier (RFLNA) is proposed for 401 to 406 MHz medical device radio-communication service band IoT applications. By employing a series RLC input matching network, the proposed RFLNA has the advantages of both the conventional RFLNA and the inductively degenerated common-source LNA without using large on-chip spiral inductors at the sources of the main transistors. The proposed active mixer utilizes a current-reuse transconductor, in which a p-channel metal-oxide semiconductor (PMOS) transistor performs a current-bleeding function to reduce direct current (DC) and flicker noise in the switching stage of the active mixer. The proposed receiver RFFE is implemented in a 65-nm CMOS process and achieves a voltage gain of 30.9 dB, noise figure of 4.1 dB, S11 of less than −10 dB, and IIP3 of −22.9 dBm. It operates at a supply voltage of 1 V with bias currents of 360 μA. The active die area is 0.4 mm × 0.35 mm.  相似文献   
5.
正This paper presents a wideband low noise amplifier(LNA) for multi-standard radio applications.The low noise characteristic is achieved by the noise-canceling technique while the bandwidth is enhanced by gateinductive -peaking technique.High-frequency noise performance is consequently improved by the flattened gain over the entire operating frequency band.Fabricated in 0.18μm CMOS process,the LNA achieves 2.5 GHz of -3 dB bandwidth and 16 dB of gain.The gain variation is within±0.8 dB from 300 MHz to 2.2 GHz.The measured noise figure(NF) and average HP3 are 3.4 dB and -2 dBm,respectively.The proposed LNA occupies 0.39 mm2 core chip area.Operating at 1.8 V,the LNA drains a current of 11.7 mA.  相似文献   
6.
本文介绍了一种适用于GPS接收机的CMOS宽带低噪声放大器,带宽设计在1.16Hz-1.7GHz。采用源极电感负反馈结构,并在输入端加入了宽带匹配网络来扩展带宽,放大器提供30dB的增益,使用了两级放大,第二级采用了电流复用技术来节省功耗,最后一级使用了源极跟随器,用来阻抗匹配。采用TSMC55nmCMOS工艺,仿真结果表明,噪声系数小于1.3dB,S21大于29dB,S11小于-10dB,1.2V电源供电下功耗为20mW。  相似文献   
7.
In this paper, an active filtering technique is presented which is capable of filtering the out-of-band blockers in wireless receivers. The concept is based on the feedforward cancellation technique where a blocker replica is subtracted at the output of the low-noise amplifier (LNA). In contrast to the previously reported feedforward cancellation methods, exact gain and phase matching are easily obtained in the proposed architecture to produce a highly selective narrowband frequency response at the output of the LNA with wide rejection bandwidth. For the proof of concept, the system is implemented in a 65 nm CMOS technology. It occupies a total area of 0.8 mm2 and the current consumption is 24 mA from a 1.2 V supply. The system post-layout simulations showed a blocker rejection of more than 33 dB for blocker signals 100 MHz away from the desired signal when the feedforward path is activated. The noise figure (NF) of the entire system is 3.8 dB that degrades to 5.8 dB when the feedforward path is activated.  相似文献   
8.
李几超 《电讯技术》2012,52(5):649-653
为了让两个地面站通过卫星链路进行无线通信,设计了一个Ku频段卫星通信系统 ,数据速率是512 kbit/s~4.096 Mbit/s,速率可调步进1 bit/s。选取了一 种较简洁的Ku频段地面 站设计方案,信道的本振为固定点频,调制解调器的中频范围是950~1 450 MHz。对卫 星通信 链 路功率进行了预算。地面站的组成设备,如调制解调器、低噪声放大器、上变频单元、下变 频单元等均选用成熟的商用货架产品,降低了设计风险和成本。本系统研制周期短,通信稳 定可靠,得到了用户的认可。  相似文献   
9.
NI Multisim 10是著名的EDA软件,其仿真功能非常强大,RF电路中LNA的设计是一个难题。使用Multisim设计RF LNA电路,利用虚拟网络分析仪和Smith圆图,对典型RF LNA电路的各种参数进行仿真测试,进而设计阻抗匹配网络,优化电路性能,在设计实践中取得了很好的效果。这对于通信电子产品的设计,对于RF电路的教学和创新型实验具有重要的意义。  相似文献   
10.
由于CMOS晶体管的特征尺寸急速的缩放,CMOS晶体管的参数不断改进,使得最新CMOS晶体管获得的噪声系数足够低到足以应用到无线电天文学,因此,在本研究课题中选用CMOS晶体管。目前的低噪声放大器的最小噪声系数是在室温环境下,通过宽带CMOS低噪声放大器的功率匹配来获得。在本研究课题中,CMOS低噪声放大器以共源共栅极结构为基本拓扑结构,主要研究LNA的几种常用的噪声系数优化方法。通过建立小信号模型,对LNA的噪声系数进行分析,得出相应的表达式。  相似文献   
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