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1.
Artificial bee colony (ABC) algorithm has several characteristics that make it more attractive than other bio-inspired methods. Particularly, it is simple, it uses fewer control parameters and its convergence is independent of the initial conditions. In this paper, a novel artificial bee colony based maximum power point tracking algorithm (MPPT) is proposed. The developed algorithm, does not allow only overcoming the common drawback of the conventional MPPT methods, but it gives a simple and a robust MPPT scheme. A co-simulation methodology, combining Matlab/Simulink™ and Cadence/Pspice™, is used to verify the effectiveness of the proposed method and compare its performance, under dynamic weather conditions, with that of the Particle Swarm Optimization (PSO) based MPPT algorithm. Moreover, a laboratory setup has been realized and used to experimentally validate the proposed ABC-based MPPT algorithm. Simulation and experimental results have shown the satisfactory performance of the proposed approach. 相似文献
2.
声波测井换能器的激发响应由换能器振动时所表现出来的动态阻抗和激发电路参数决定。而换能器的动态(阻抗)参数随压电晶体及其装配方式(力学边界条件)改变。为了测量换能器动态参数的影响,采用声波测井仪器常用的压电晶体和升压变压器,通过改变激发脉冲宽度和直流电压进行了实验,结果发现:在换能器两端的瞬态响应中,一共有三个二阶网络响应,分别对应于不同的频率。最低的一个影响声波测井波形的基线、与换能器主频接近的一个决定激发效率以及电路与压电晶体之间的匹配关系,是激发电路设计中比较关键的,其参数可以通过导纳圆测量仪器得到。 相似文献
3.
This work considers the problem of increasing the performance of the ciphers based on Data-Dependent (DD) operations (DDO)
for VLSI implementations. New minimum size primitives are proposed to design DDOs. Using advanced DDOs instead of DD permutations
(DDP) in the DDP-based iterative ciphers Cobra-H64 and Cobra-H128 the number of rounds has been significantly reduced yielding
enhancement of the “performance per cost” value and retaining security at the level of indistinguishability from a random
transformation. To obtain further enhancement of this parameter a new crypto-scheme based on the advanced DDOs is proposed.
The FPGA implementation of the proposed crypto-scheme achieves higher throughput value and minimizes the allocated resources
than the conventional designs. Design of the DDO boxes of different orders is considered and their ASIC implementation is
estimated. 相似文献
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5.
介绍数字正交上变频器AD9857的原理、功能和基本使用方法以及如何通过单片机8051实现对它的编程控制。 相似文献
6.
This paper describes the implementation of a stereo-vision system using Field Programmable Gate Arrays (FPGAs). Reconfigurable hardware, including FPGAs, is an attractive platform for implementing vision algorithms due to its ability to exploit parallelism often found in these algorithms, and due to the speed with which applications can be developed as compared to hardware. The system outputs 8-bit, subpixel disparity estimates for 256× 360 pixel images at 30,fps. A local-weighted phase correlation algorithm for stereo disparity [Fleet, D. J.: {Int. Conf. Syst. Man Cybernetics 1:48–54 (1994)] is implemented. Despite the complexity of performing correlations on multiscale, multiorientation phase data, the system runs as much as 300 times faster in hardware than its software implementation. This paper describes the hardware platform used, the algorithm, and the issues encountered during its hardware implementation. Of particular interest is the implementation of multiscale, steerable filters, which are widely used in computer vision algorithms. Several trade-offs (reducing the number of filter orientations from three to two, using fixed-point computation, changing the location of one localized low-pass filter, and using L1 instead of L2 norms) were required to both fit the design into the available hardware and to achieve video-rate processing. Finally, results from the system are given both for synthetic data sets as well as several standard stereo-pair test images. 相似文献
7.
8.
Generation of Technology-Independent Retargetable Analog Blocks 总被引:1,自引:0,他引:1
R. Castro-López F. V. Fernández F. Medeiro A. Rodríguez-Vázquez 《Analog Integrated Circuits and Signal Processing》2002,33(2):157-170
This paper introduces a complete methodology for retargeting of analog cells to different sets of specifications. This methodology is technology-independent, thus allowing the migration, from one technology to another, of the circuit under retargeting. Careful integration of the device sizing and layout generation tasks via the incorporation of layout constraints during the sizing process allows to generate fully functional designs in a few minutes. The methodology is illustrated via the retargeting of a fully-differential Miller-compensated two-stage operational amplifier for a new set of specifications and two different technological processes.An erratum to this article can be found at 相似文献
9.
10.