Artificial bee colony based algorithm for maximum power point tracking (MPPT) for PV systems operating under partial shaded conditions

Artificial bee colony (ABC) algorithm has several characteristics that make it more attractive than other bio-inspired methods. Particularly, it is simple, it uses fewer control parameters and its convergence is independent of the initial conditions. In this paper, a novel artificial bee colony based maximum power point tracking algorithm (MPPT) is proposed. The developed algorithm, does not allow only overcoming the common drawback of the conventional MPPT methods, but it gives a simple and a robust MPPT scheme. A co-simulation methodology, combining Matlab/Simulink™ and Cadence/Pspice™, is used to verify the effectiveness of the proposed method and compare its performance, under dynamic weather conditions, with that of the Particle Swarm Optimization (PSO) based MPPT algorithm. Moreover, a laboratory setup has been realized and used to experimentally validate the proposed ABC-based MPPT algorithm. Simulation and experimental results have shown the satisfactory performance of the proposed approach.     

声波测井换能器激发响应实验研究

声波测井换能器的激发响应由换能器振动时所表现出来的动态阻抗和激发电路参数决定。而换能器的动态（阻抗）参数随压电晶体及其装配方式（力学边界条件）改变。为了测量换能器动态参数的影响，采用声波测井仪器常用的压电晶体和升压变压器，通过改变激发脉冲宽度和直流电压进行了实验，结果发现：在换能器两端的瞬态响应中，一共有三个二阶网络响应，分别对应于不同的频率。最低的一个影响声波测井波形的基线、与换能器主频接近的一个决定激发效率以及电路与压电晶体之间的匹配关系，是激发电路设计中比较关键的，其参数可以通过导纳圆测量仪器得到。     

Controlled elements for designing ciphers suitable to efficient VLSI implementation

This work considers the problem of increasing the performance of the ciphers based on Data-Dependent (DD) operations (DDO) for VLSI implementations. New minimum size primitives are proposed to design DDOs. Using advanced DDOs instead of DD permutations (DDP) in the DDP-based iterative ciphers Cobra-H64 and Cobra-H128 the number of rounds has been significantly reduced yielding enhancement of the “performance per cost” value and retaining security at the level of indistinguishability from a random transformation. To obtain further enhancement of this parameter a new crypto-scheme based on the advanced DDOs is proposed. The FPGA implementation of the proposed crypto-scheme achieves higher throughput value and minimizes the allocated resources than the conventional designs. Design of the DDO boxes of different orders is considered and their ASIC implementation is estimated.     

有互感和电源的电容耦合电路的量子涨落

通过正则变换和幺正变换的方法研究了有互感和电源存在的情况下的介观电容耦合电路的量子涨落。结果表明电荷和电流的量子涨落与电源无关。当电路元件确定时，如果L1／L2的值很大或很小，耦合对涨落的影响很大。互感从有到无的过程中，回路1中电流的涨落和回路中2中电荷的涨落有明显的变化。换句话说，互感的有无对涨落的大小起着举足轻重的作用。     

超宽带极窄脉冲设计与产生

超宽带(UWB)技术是以持续时间极短的脉冲作为传输载体进行数据通信的无线新技术。基于BJT雪崩特性,本文采用并行同时触发的工作方式,设计并产生了高重复速率的UWB脉冲电路发生器,极大地减少了时延,缩短了上升时间,提高了脉冲的幅度,并从等效电路法的观点分析计算了脉冲的特性参数,理论结果与实测结果具有较好的一致性。     

Generation of Technology-Independent Retargetable Analog Blocks

This paper introduces a complete methodology for retargeting of analog cells to different sets of specifications. This methodology is technology-independent, thus allowing the migration, from one technology to another, of the circuit under retargeting. Careful integration of the device sizing and layout generation tasks via the incorporation of layout constraints during the sizing process allows to generate fully functional designs in a few minutes. The methodology is illustrated via the retargeting of a fully-differential Miller-compensated two-stage operational amplifier for a new set of specifications and two different technological processes.An erratum to this article can be found at     

在协议集成测试系统上开展路由协议测试

在分析路由协议的特性及其测试需求的基础上，提出利用窗口黑盒来描述被测协议，利用多通道测试方法扩展对被测实现的控制和观察，通过扩充参考实现增强系统的测试能力。将这些理论，技术应用于系统中，对路由协议开展了有效的测试活动，为国产高性能路由器的开发提供了有力的支持，也进一步增强了PITS系统的功能和适用性。     

基于IP核复用技术的SoC设计

概述了国内外IP产业的发展情况,论述了我国发展IP核复用技术SoC设计的可能性和必要性,指出我国急需发展的关键芯片及IP核种类.     

Parallel path consistency

Filtering algorithms are well accepted as a means of speeding up the solution of the consistent labeling problem (CLP). Despite the fact that path consistency does a better job of filtering than arc consistency, AC is still the preferred technique because it has a much lower time complexity. We are implementing parallel path consistency algorithms on multiprocessors and comparing their performance to the best sequential and parallel arc consistency algorithms.^(1,2) (See also work by Kerethoet al. ⁽³⁾ and Kasif⁽⁴⁾) Preliminary work has shown linear performance increases for parallelized path consistency and also shown that in many cases performance is significantly better than the theoretical worst case. These two results lead us to believe that parallel path consistency may be a superior filtering technique. Finally, we have implemented path consistency as an outer product computation and have obtained good results (e.g., linear speedup on a 64K-node Connection Machine 2).     

一种动态开关电容运算放大器共模负反馈电路

本文主要介绍了一种应用于Cascode结构运放中的开关电容共模负反馈电路，它具有稳定性好、对运放频率特性影响小、不消耗额外功率等优点。对电路运用Hspice进行了模拟，并给出了模拟结果。