A programmable gain amplifier with a DC offset calibration loop for a directconversion WLAN transceiver

A high-linearity PGA(programmable gain amplifier) with a DC offset calibration loop is proposed.The PGA adopts a differential degeneration structure to vary voltage gain and uses the closed-loop structure including the input op-amps to enhance the linearity.A continuous time feedback based DC offset calibration loop is also designed to solve the DC offset problem.This PGA is fabricated by TSMC 0.13μm CMOS technology.The measurements show that the receiver PGA(RXPGA) provides a 64 dB gain range with a step of 1 dB,and the transmitter PGA(TXPGA) covers a 16 dB gain.The RXPGA consumes 18 mA and the TXPGA consumes 7 mA (I and Q path) under a 3.3 V supply.The bandwidth of the multi-stage PGA is higher than 20 MHz.In addition,the DCOC(DC offset cancellation) circuit shows 10 kHz of HPCF(high pass cutoff frequency) and the DCOC settling time is less than 0.45μs.     

应用于WLAN系统具有高线性度的基带Gm-C滤波器

本文介绍了一种应用于无线局域网(WLAN)收发机系统的跨导-电容(Gm-C)低通滤波器,该滤波器能够工作于低电压并具有高线性度。该射频发射器(Tx)中的滤波器采用截止频率为9.8MHz的三阶切比雪夫低通滤波器原形,在30MHz频率处的阻带衰减达到35dB。由于采用了工作在线性区MOS的伪差分跨导,此滤波器的IIP3可达9.5dBm之高。本电路采用0.35-μm CMOS工艺实现,滤波器的芯片面积为0.41mm0.17mm,工作在3.3V电源电压时所消耗电流为3.36mA 。     

一种应用于直接变频系统的低功耗混合信号直流失调消除电路

A low power mixed signal DC offset calibration (DCOC) circuit for direct conversion receiver applications is designed. The proposed DCOC circuit features low power consumption, fast settling time and a small die area by avoiding the trade-off between loop response time and the high pass frequency of the DCOC servo loop in conventional analog DCOC systems. By applying the proposed DC offset correction circuitry, the output residue DC offset voltages are reduced to less than 38 mV and the DCOC loop settling time is less than 100 μs. The DCOC chip is fabricated in a standard 0.13-μm CMOS technology and drains only 196 μA from a 1.2-V power supply with its chip area of only 0.372 × 0.419 mm².     

A 200 mA CMOS low-dropout regulator with double frequency compensation techniques for SoC applications

This paper presents a 200mA low-dropout (LDO) linear regulator using two modified techniques for frequency compensation. One technique is that the error amplifier using common source stage with variable load, which is controlled by output current, is served as the second stage for stable frequency responses. Another technique is the LDO uses pole-zero tracking compensation technique at error amplifier to achieve good frequency response. The proposed circuit was fabricated and tested in HJTC 0.18μm CMOS technology. The designed LDO linear regulator works under the input voltage of 2.8V-5V and provides up to 200mA load current for an output voltage of 1.8V. The total error of the output voltage due to line and load variation is less than 0.015%. The LDO die area is 630*550μm² and the quiescent current is 130μA.     

生长气体流量对SiC单晶缺陷的影响

实现了熔融KOH进行SiC体单晶择优腐蚀估测缺陷密度的方法.本文报道了采用该技术对体SiC单晶缺陷密度估测的结果.腐蚀会在Si面形成六边形腐蚀坑,在C面形成圆形腐蚀坑.腐蚀速率和蚀坑形状与SiC生长工艺有关.对在高生长气流量下用PVT工艺制备的SiC样品,其刃位错、螺位错与微管密度分别为2.82×105,94和38cm-2;对在低生长气流量下用PVT工艺制备的SiC样品,其上述缺陷密度分别为9.34×105,2和29cm-2.结果表明:随着生长气体流量的增加,由于避免了N2掺杂,刃位错密度下降.     

继往开来、重振我国电力电子器件研发领域的雄风——电力电子器件研发进展专辑特邀主编评述

电力电子器件作为电力电子技术的3个主要支撑点之一,其前进步伐在很大程度上决定着整个电力电子技术领域的发展.     

碳化硅电力电子器件及其制造工艺新进展

评述了各种碳化硅电力电子器件研究开发的最新进展及其发展前景,指出碳化硅的优势不仅仅限于能提高功率开关器件的电压承受能力、高温承受能力和兼顾频率与功率的能力,还在于能大幅度降低器件的功率损耗,使电力电子技术的节能优势得以更加充分地发挥.针对碳化硅材料的特殊性和实现碳化硅器件卓越性能的需要,分析了器件工艺当前亟待解决的问题.     

用CMOS工艺改善集成开关电容DC-DC变换器的特性

介绍了一种具有改进电路结构和改进工艺的单片集成3.3V/ 1.2 V开关电容DC- DC变换器,其控制脉冲频率和固定导通比分别为10 MHz和0 .5 .为了提高变换器的输出电流,采用CMOS工艺来制造电路中的开关器件和改进的互补型电路结构.使用Hspice电路仿真软件得到的仿真结果表明改进变换器的单个单元电路和互补型电路可使输出电流分别达到12 .5 m A和2 6 m A,且后者的功率转换效率为73% ,输出电压纹波小于1.5 % .变换器在日本东京大学的标准Rohm 0 .35 μm CMOS工艺线上投片试制,测试结果显示,使用CMOS开关的变换器单元电路的输出电流为9.8m A.     

碳化硅电力电子器件及其应用的研发新进展

综合评述诸如肖特基势垒二极管、pn结二极管、功率MOS、功率JFET、BJT、GTO、GCT以及功率模块等各种碳化硅电力电子器件研究开发的最新进展及其发展前景，指出碳化硅的优势不仅仅限于能提高功率开关器件的电压承受能力、高温承受能力和兼顾频率与功率的能力，还在于能大幅度降低器件的功率消耗，使电力电子技术的节能优势得以更加充分的发挥；文章还对碳化硅器件在电力电子领域特别是电力变换器方面的初步应用及开发情况也做了简略介绍。     

结温在线控制系统的IGBT功率模块热耦合模型

应用有限元法，对IGBT功率模块的三维热分布进行了仿真研究，得到了器件的稳态热阻及瞬态热阻抗。研究了功率模块各芯片之间的相互热影响，提出了热耦合效应热模型的统一结构，基于对瞬态热阻抗曲线的拟合，得到热模型的相关参数，从而建立了热耦合效应热模型。以一个降压变换器为例，阐述了结温在线控制系统的工作原理，并将热模型应用于该系统中，计算结果与测量结果非常一致。