Gate and drain currents in off-state buried-type p-channel LDDMOSFETs

The buried-type p-channel LDD MOSFETs biased at high positive gate voltage exhibit novel characteristics: (1) the ratio of the drain to gate currents is about 1×10^-3 to 5×10^-3; and (2) the gate and drain currents both are functions of only the gate voltage minus the n-well bias. Such characteristics are addressed based on the formation of the surface n ⁺ inversion layer due to the punchthrough of the buried channel to the underlying shallow p-n junction. The measured gate current is due to the Fowler-Nordheim tunneling of electrons from this inversion layer surface and the holes generated within the high-field oxide constitute the drain current. The n⁺ inversion layer surface potential is found to be equal to the n-well bias plus 0.55 V. As a result, both the oxide field and the gate and drain currents are independent of drain voltage     

The effect of pack-aluminisation on the microstructure of MCrAlY and the performance of thermal barrier coatings

Plasma spraying and pack-aluminising processes were combined and applied to the nickel-base superalloy Mar-M247 to improve its cyclic oxidation resistance. The performance tests of duplex ZrO₂-8 wt.%Y₂O₃/MCrAlY thermal barrier coatings (TBCs) were conducted at 1050 °C, 1075 °C, 1100 °C, 1150 °C and 1200 °C. The results of the experiments in this study showed that TBC specimens with the aluminised MCrAlY bond coat exhibited higher cyclic lives (except for the Ni-22Cr-10Al-1Y bond coat), at all the temperatures tested, than specimens on which the bond coat was not aluminised. The microstructures of the Co-29Cr-6Al-1Y, Co-32Ni-21Cr-8Al-0.5Y and Ni-22Cr-10Al-1Y bond coats with or without aluminising treatment were examined in detail using a scanning electron microscope equipped with an electron probe microanalyzer.     

An extraction method to determine interconnect parasitic parameters

Interconnect parasitic parameters in integrated circuits have significant impact on circuit speed. An accurate monitoring of these parameters can help to improve interconnect performance during process development, provide information for circuit design, or give useful reference for circuit failure analysis. Existing extraction methods either are destructive (such as SEM measurement) or can determine only partial parasitic parameters (such as large capacitor measurement). In this paper, we present a new method for extracting interconnect parasitic parameters, which can simultaneously determine the interlayer and intralayer capacitances, line resistance, and effective line width. The method is based on two test patterns of the same structure with different dimensions. The structure consumes less wafer area than existing methods. The method shows good agreement with SEM measurement of dielectric thickness in both nonglobal planarized and chemical-mechanical polished processes, and gives accurate prediction of the process spread of a ring oscillator speed over a wafer     

Parametrized Maximum Principle Preserving Flux Limiters for High Order Schemes Solving Multi-Dimensional Scalar Hyperbolic Conservation Laws

In this paper, we will extend the strict maximum principle preserving flux limiting technique developed for one dimensional scalar hyperbolic conservation laws to the two-dimensional scalar problems. The parametrized flux limiters and their determination from decoupling maximum principle preserving constraint is presented in a compact way for two-dimensional problems. With the compact fashion that the decoupling is carried out, the technique can be easily applied to high order finite difference and finite volume schemes for multi-dimensional scalar hyperbolic problems. For the two-dimensional problem, the successively defined flux limiters are developed for the multi-stage total-variation-diminishing Runge–Kutta time-discretization to improve the efficiency of computation. The high order schemes with successive flux limiters provide high order approximation and maintain strict maximum principle with mild Courant-Friedrichs-Lewy constraint. Two dimensional numerical evidence is given to demonstrate the capability of the proposed approach.     

网络媒介影响下建筑相关问题初探

自工业革命以来形成的社会生活方式,在信息数字技术的影响下发生着悄无声息的变化.从原子到比特,数字化生存是必然的趋势.网络媒介的出现使得人们在交流和机会等方面获得平等的权利.随之产生的人们的生活方式、行为的改变已经为艺术领域带来了新的变化.通过对艺术创作的考察,为建筑领域的相关问题提供了参照、借鉴.在建筑创作中,＂图＂与＂底＂的关系正在模糊化,信息交流方式更多样化并具有一定的阶段性,动态的模数将导致更具个性化的设计,空间界面更为柔化,设计成果的生成也具有了更多的不可预见性.     

图像阈值自动选取算法的C＋＋实现

图像分割是运动目标检测与跟踪技术必须要解决的问题,在很多时候它涉及到图像阈值的选取。文章采用的算法首先计算图像中不同区域的灰度均值,结合最小差值条件,反复修订由计算所得的阈值,从而达到自动选优的目的。在此基础上,文章进一步给出了用C＋＋语言实现算法的关键代码。测试表明此方法选择阈值简便实用,图像的二值化效果良好。     

Preparation and characterization of GaN films grown on Ga-diffused Si （111） substrates

Hexagonal GaN films were prepared by nitriding Ga2O3 films with flowing ammonia. Ga2O3 films were deposited on Ga-diffused Si (111) substrates by radio frequency (r.f.) magnetron sputtering. This paper have investigated the change of structural properties of GaN films nitrided in NH3 atmosphere at the temperatures of 850, 900, and 950℃ for 15 min and nitrided at the temperature of 900℃ for 10, 15, and 20 rain, respectively. X-ray diffraction (XRD), scanning electron microscopy (SEM), transmission electron microscopy (TEM) and X-ray photoelectron spectroscopy (XPS) were used to analyze the structure, surface morphology and composition of synthesized samples. The results reveal that the as-grown films are polycrystalline GaN with hexagonal wurtzite structure and GaN films with the highest crystal quality can be obtained when nitrided at 900℃ for 15 min.     

逆变电源的可靠性及其提高途径

影响逆变焊接电源可靠性的因素是多方面的.如产品的设计和生产等各个环节.根据实践经验提出了解决可靠性问题的一些有效途径和方法.     

运用多媒体改革经济数学教学存在的问题与对策

如何将多媒体技术有效地应用于经济数学课堂教学中,是目前经济数学教学改革值得注意的问题。结合教学实践,分析当前经济数学多媒体教学存在的问题,提出经济数学课程使用多媒体教学必须结合课程的特点,教学的需要以及学生的实际情况,将传统黑板教学与多媒体教学优势互补,以实现最佳教学效果。