Matlab语言与线性电路的符号仿真

目前的电路仿真软件通常是在电路中所有元件值都是给定的情况下得到一些数值结果，而非解析结果。该文利用Matlab的符号运算功能编程，通过节点列表法，实现了任意线性电路的自动解析求解，为电路分析提供了一个有效的辅助工具。     

Education-driven research in CAD

We argue for a new research category, named education-driven research (EDR), which fills the gap between traditional field-specific research that is not concerned with educational objectives and research in education that focuses on fundamental teaching and learning principles and possibly on their customization to broad areas (such as mathematics or physics), but not to specific disciplines (such as CAD). The objective of EDR is to simplify the formulation of the underlying theoretical foundations and of specific tools and solutions in a specialized domain, so as to make them easy to understand and internalize. As such, EDR is a difficult and genuine research activity, which requires a deep understanding of the specific field and can rarely be carried out by generalists with primary expertise in broad education principles. We illustrate the concept of EDR with three examples in CAD: (1) the Split and Tweak subdivisions of a polygon and its use for generating curves, surfaces, and animations; (2) the construction of a topological partition of a plane induced by an arbitrary arrangement of edges; and (3) a romantic definition of the minimal and Hausdorff distances. These examples demonstrate the value of using analogies, of introducing evocative terminology, and of synthesizing the simplest fundamental building blocks. The intuitive understanding provided by EDR enables the students (and even the instructor) to better appreciate the limitations of a particular solution and to explore alternatives. In particular, in these examples, EDR has allowed the author to: (1) reduce the cost of evaluating a cubic B-spline curve; (2) develop a new subdivision curve that is better approximated by its control polygon than either a cubic B-spline or an interpolating 4-point subdivision curve; (3) discover how a circuit inclusion tree may be used for identifying the faces in an arrangement; and (4) rectify a common misconception about the computation of the Hausdorff error between triangle meshes. We invite the scientific community to encourage the development of EDR by publishing its results as genuine research contributions in peer-reviewed professional journals.     

高频数字锁相环的研究

论文阐述了１００ＭＨｚ数字锁相环的设计过程，用１０ＭＨｚ晶体振荡器对１００ＭＨｚ数字压控振荡器进行锁相，使１００ＭＨｚ输出信号指标得到很大改善。论文还分析了各单元电路，关键点时域波形测试，频谱测试。     

特低渗透油层含油饱和度的一种校正方法

松辽盆地北部扶杨油层属特低渗透油层，即使采用油基泥浆取心或密闭取心样品，束缚水饱和度也难以测准。蒸馏法试验表明，若试验温度低，则束缚水蒸发不彻底，实测含水饱和度偏低；若试验温度高，则容易造成岩样粘土矿物晶间水脱水，实测含水饱和度偏高，影响了储量计算精度。为搞清特低渗透油层流体蒸发特征，开展了蒸发率试验，试验过程是：将岩样洗油后重新饱和水，再在与蒸馏法试验相同的试验条件下测定蒸发的水量。试验结果表明，有效孔隙度越小，蒸发率越低。由于两个试验过程的蒸发率近似相等，用蒸发率试验可以模拟蒸馏法试验，由此推导出束缚水饱和度计算公式。应用该公式对榆树林油田进行测算，校正前后原始含油饱和度相差１２％以上，储量相差２０×１０６ｔ以上。图２（郭海莉摘）     

CRC计算方法的研究

本文丛面地介绍了ＣＲＣ的基本原理和计算方法，并给出了编程实例。     

深亚微米集成电路的快速时域仿真技术

随着深亚微米集成电路技术的发展，集成电路的规模越来越大，工作频率越来越高，并正朝着系统集成的方向发展，因而在模拟速度，模拟精度和可模拟的电路规模等各个方面对电路仿真技术提出了新的要求。近年来，各种新的电路仿真方法和仿真系统用相继脱颖百出，并将取代那些传统的，已经无法适应深亚微米技术发展的电路仿真器。     

基于OTA的多功能电压模滤波器及其仿真

本文采用信号流图法设计了一种基于ＯＴＡ的三输入一输出多功能电压模滤波器新电路，该电路由五个ＯＴＡ和两个接地电容构成，合理选择输入电压可实现低通、高通、带通、带阻及全通滤波功能。文章还对电路进行了ＭＯＳ管级的计算机仿真，其结果表明所提出的电路方案正确有效。     

一种提高地震速度解释精度的新方法

本以利用速度谱所伴生的叠加能量，采用二次曲线插值方法，寻找最大的叠加能量有所对应时间，然后利用叠加速度进行倾角校正，相位校正和最大炮检距校正，获取比较精确的层速度参数。     

Techniques for estimating test length under random test

When a circuit is tested using random or pseudorandom patterns, it is essential to determine the amount of time (test length) required to test it adequately. We present a methodology for predicting different statistics of random pattern test length. While earlier methods allowed estimation only of upper bounds of test length and only for exhaustive fault coverage, the technique presented here is capable of providing estimates of all statistics of interest (including expected value and variance) for all coverage specifications.Our methodology is based on sampling models developed for fault coverage estimation [1]. Test length is viewed as awaiting time on fault coverage. Based on this relation we derive the distribution of test length as a function of fault coverage. Methods of approximating expected value and variance of test length are presented. Accuracy of these approximations can be controlled by the user. A practical technique for predicting expected test length is developed. This technique is based on clustering faults into equal detectability subsets. A simple and effective algorithm for fault clustering is also presented. The sampling model is applied to each cluster independently and the results are then aggregated to yield test lengths for the whole circuit. Results of experiments with several circuits (both ISCAS '85 benchmarks and other practical circuits) are also provided.This work was done while the author was with the Department of Electrical Engineering, Southern Illinois University, Carbondale, IL 62901.     

An implementation for a fast public-key cryptosystem

In this paper we examine the development of a high-speed implementation of a system to perform exponentiation in fields of the form GF(2 ⁿ ). For sufficiently large n, this device has applications in public-key cryptography. The selection of representation and observations on the structure of multiplication have led to the development of an architecture which is of low complexity and high speed. A VLSI implementation has being fabricated with measured throughput for exponentiation for cryptographic purposes of approximately 300 kilobits per second.