Revisiting the Parallel Strategy for DOACROSS Loops

Journal of Computer Science and Technology - DOACROSS loops are significant parts in many important scientific and engineering applications, which are generally exploited pipeline/wave-front...     

Ferroelectric and electromechanical performance of diverse engineered states of Mn-doped 0.75Pb(Mg1/3Nb2/3)O3-0.25PbTiO3 ceramics

The materials processing history has a great influence on their properties and finally determines their application effect. In this paper, the ferroelectric, polarization-switching current, and strain properties of Mn-doped 0.75Pb(Mg_1/3Nb_2/3)O₃-0.25PbTiO₃ ceramics were studied in fresh state, aged state, and poled state, respectively. Compared with the symmetric polarization-electric-field (P-E) hysteresis loops, current-density-electric-field (J-E) curves, and bipolar electric-field-induced strain (S-E) curves in fresh state samples, asymmetric P-E loops, J-E curves, and bipolar S-E curves were obtained in poled state samples. Well-aged-state samples exhibit double hysteresis P-E loop, four peaks J-E curves, and symmetric S-E curves without negative strain. The symmetry-conforming short-range order (SC-SRO) principle of point defects and internal electric field E_i is employed to clarify the different phenomenon of three states. Results indicated that randomly oriented defect polarization P_D in aged samples can reverse the spontaneous polarization P_S back and result in the double hysteresis P-E loop and four peaks J-E curves. The oriented P_D and resulting E_i in poled-state samples will lead to the asymmetric loops and strain memory effect.     

Charge controlled delay element enabled widely linear power efficient MPCG-MDLL in 1.2V, 65nm CMOS

In this work, a robust, low-power, widely linear multiphase clock generation and multiplying delay-locked loop (MPCG-MDLL) architecture is realized, using a new differential charge-mode delay element circuit topology. The heart of any MPCG-MDLL architecture is the delay element, and hence, the characteristics of the delay element influence the overall performance of the MPCG-MDLL, in terms of its specifications such as peak-to-peak jitter, lock range, delay range, control voltage range, and power consumption. The proposed eight-phase MPCG-MDLL along with the charge-mode delay element outperforms the conventional MPCG-MDLLs that deploy delay elements such as a current-starved inverter (CSI), wide-range CSI, triply controlled delay cell, digital-controlled delay element, and the like. The eight-phase MPCG-MDLL along with the new charge-mode delay element circuit topology is implemented in 1.2-V, 65-nm CMOS technology. The performance results show that the eight-stage delay line has a delay range from 640 to 960 ps over the rail-to-rail control voltage range. The implemented MPCG-DLL is robust over process, voltage, and temperature (PVT) corners and exhibits a lock range of 400 MHz and a peak-to-peak jitter of less than 60 fs for all the DLL output phases and peak-to-peak jitter of 0.54 and 1.24 ps for the synthesized 5-GHz clocks for an input reference clock frequency of 1.25 GHz. The MPCG-MDLL consumes 4.74 mW of power and occupies an area of 0.017 mm².     

Tuning of dielectric and ferroelectric properties in single phase BiFeO3 ceramics with controlled Fe/Fe ratio

Single phase multiferroic BiFeO₃ (BFO) ceramics were synthesized with controllable amount of Fe²⁺ and oxygen vacancies in a very wide concentration range. Double ferroelectric hysteresis loops are observed in fresh BFO ceramics at room temperature without any aging processes. Detailed study shows that this is due to the defect dipoles which have preferential orientations antiparallel to the direction of spontaneous polarization, providing a driving force for domain back-switching. The dielectric constant of BFO could be enormously enhanced by 100 times by increasing the Fe²⁺ content, employing a polaronic relaxation process.     

Locality‐Conscious Nested‐Loops Parallelization

To speed up data‐intensive programs, two complementary techniques, namely nested loops parallelization and data locality optimization, should be considered. Effective parallelization techniques distribute the computation and necessary data across different processors, whereas data locality places data on the same processor. Therefore, locality and parallelization may demand different loop transformations. As such, an integrated approach that combines these two can generate much better results than each individual approach. This paper proposes a unified approach that integrates these two techniques to obtain an appropriate loop transformation. Applying this transformation results in coarse grain parallelism through exploiting the largest possible groups of outer permutable loops in addition to data locality through dependence satisfaction at inner loops. These groups can be further tiled to improve data locality through exploiting data reuse in multiple dimensions.     

Mechanics-aided digital image correlation for the investigation of piezoelectric and ferroelectric behaviour of a soft PZT

The strain response of a polarised PZT was characterised using Digital Image Correlation (DIC). The DIC algorithm is based on a global approach and regularises the displacement field using the balance equations of solid mechanics. The measurement error is reduced by correcting the displacements that are mechanically not admissible. A ferroelectric test showed that the standard deviations of strain fields remain mostly under 1.2 × 10^?4 for an element size of 64 px. The standard deviation on the average value is 3 × 10^?6. The strain field is homogeneous and its average value is consistent with the strain obtained from a CCD laser measurement device. The longitudinal strain, transverse strain and polarisation response of the PZT were measured for bipolar and unipolar loadings ranging from 50 to 5000 V/mm. Material properties were extracted from these measurements. This work shows the advantages of a novel 2D-DIC algorithm for piezoelectric strain characterisation.     

Programming with event loops and control loops – From actors to agents

Event loops are a main control architecture to implement actors. In this paper we first analyse the impact that this choice has on the design of actor-based concurrent programs. Then, we discuss control loops as the main architecture adopted to implement agents, and we frame them as an extension of event loops effective to improve the programming of autonomous components that need to integrate both reactive and proactive behaviors, in a modular way.     

Self-adaptive systems: A survey of current approaches,research challenges and applications

Self-adaptive software is capable of evaluating and changing its own behavior, whenever the evaluation shows that the software is not accomplishing what it was intended to do, or when better functionality or performance may be possible. The topic of system adaptivity has been widely studied since the mid-60s and, over the past decade, several application areas and technologies relating to self-adaptivity have assumed greater importance. In all these initiatives, software has become the common element that introduces self-adaptability. Thus, the investigation of systematic software engineering approaches is necessary, in order to develop self-adaptive systems that may ideally be applied across multiple domains. The main goal of this study is to review recent progress on self-adaptivity from the standpoint of computer sciences and cybernetics, based on the analysis of state-of-the-art approaches reported in the literature. This review provides an over-arching, integrated view of computer science and software engineering foundations. Moreover, various methods and techniques currently applied in the design of self-adaptive systems are analyzed, as well as some European research initiatives and projects. Finally, the main bottlenecks for the effective application of self-adaptive technology, as well as a set of key research issues on this topic, are precisely identified, in order to overcome current constraints on the effective application of self-adaptivity in its emerging areas of application.     

一种采用螺旋耦合环的同轴腔可调滤波器

提出了一种采用螺旋耦合环的小型化连续可调的同轴腔可调滤波器.对比传统的单一窗口耦合结构,加入螺旋耦合环可以显著地减小可调滤波器在整个工作频率范围内的带宽变化.采用螺旋耦合环可使可调滤波器插入损耗指标获得进一步改善,并可利用它对滤波器带宽在一定范围内进行调节.基于这种耦合结构设计了一个3腔可调滤波器,并对其传输特性进行了...