首页 | 本学科首页   官方微博 | 高级检索  
文章检索
  按 检索   检索词:      
出版年份:   被引次数:   他引次数: 提示:输入*表示无穷大
  收费全文   27篇
  免费   2篇
  国内免费   9篇
综合类   2篇
无线电   8篇
自动化技术   28篇
  2020年   1篇
  2018年   2篇
  2017年   4篇
  2016年   3篇
  2015年   7篇
  2014年   5篇
  2013年   6篇
  2012年   3篇
  2011年   3篇
  2009年   4篇
排序方式: 共有38条查询结果,搜索用时 15 毫秒
1.
In this paper, an accurate approach for estimating the dynamic stability of static random access memory (SRAM) is proposed. The conventional methods of SRAM stability estimation suffer from two major drawbacks: (1) using static failure criteria, such as SNM, which does not capture the transient and dynamic behavior of SRAM operation, and (2) using quasi-Monte-Carlo simulation, which approximates the failure distribution, resulting in large errors at the tails where the desired failure probabilities exist. These drawbacks are eliminated by employing accurate simulation-based dynamic failure criteria along with a new distribution-independent, Most-probable-failure-point search technique for accurate probability calculation. Compared to previously published techniques, the proposed dynamic stability technique offers orders of magnitude improvement in accuracy. Furthermore, the proposed dynamic stability technique enables the correct evaluation of stability in real operation conditions and for different dynamic circuit techniques, such as dynamic write back, where the conventional methods are not applicable.  相似文献   
2.
Power consumption remains a hot issue in all areas of computing ranging from embedded systems that rely on batteries to large scale data centers where reducing the power consumption of computing devices directly affects not only the management cost, but also contributes to a greener computing environment. The power-aware real-time scheduling problem has recently been addressed for a compositional framework with periodic task model under the assumption that a processor can continuously vary its operating frequency and voltage. However, in practice, this technique is only suboptimal and still produce the waste of computational resources. This paper introduces new frequency scaling schemes that statically determine optimal processor speeds at system, component, and task levels with the objective of minimizing the total energy consumption of the entire framework. Since real-world processors support only a finite set of operating frequencies, our algorithms also consider only discrete speed levels and guarantee still that each task meets its deadline. We implemented and evaluated the performance of a prototype framework that incorporates our algorithms on top of the RT-Xen hypervisor in order to provide power-aware compositional real-time scheduling framework to virtual machines.  相似文献   
3.
Extreme scale supercomputers available before the end of this decade are expected to have 100 million to 1 billion computing cores. The power and energy efficiency issue has become one of the primary concerns of extreme scale high performance scientific computing. This paper surveys the research on saving power and energy for numerical linear algebra algorithms in high performance scientific computing on supercomputers around the world. We first stress the significance of numerical linear algebra algorithms in high performance scientific computing nowadays, followed by a background introduction on widely used numerical linear algebra algorithms and software libraries and benchmarks. We summarize commonly deployed power management techniques for reducing power and energy consumption in high performance computing systems by presenting power and energy models and two fundamental types of power management techniques: static and dynamic. Further, we review the research on saving power and energy for high performance numerical linear algebra algorithms from four aspects: profiling, trading off performance, static saving, and dynamic saving, and summarize state-of-the-art techniques for achieving power and energy efficiency in each category individually. Finally, we discuss potential directions of future work and summarize the paper.  相似文献   
4.
提出一种基于岛间队列特征的动态电压频率缩放控制算法,使用岛间队列增长率和使用率来实现电压岛工作电压/频率的动态控制。该算法引入岛间队列增长率实现了简单高效的负载预测,提高了片上通信稳定性。仿真分析表明,该算法能够更好地节能降耗。  相似文献   
5.
A modify wrapper/test access mechanism(TAM) structure is described to explore the maximal potential capacity of TAM, named “IP cores resource multiplexing(IPRM)”, reducing test application time for DVFS-based multicore System-on-Chips(MSoCs). The IPRM core wrappers, different from standard wrappers, enable to isolated core wrapper resource again to store test data for embedded cores under test. An integer linear programming (ILP) formulation with IPRM wrapper is proposed to improve multi-site test. Experimental results of the ITC’02 SoC Benchmark show that IPRM core wrapper reduces the burdens on ATE effectively, and can reduce the test application time by 10–50%.  相似文献   
6.
不断增长的能源消耗已经成为制约云计算发展的瓶颈.指出了DVFS节能贪婪算法的局限性,针对降低能耗与保持处理器运算能力的矛盾,提出了一种改进的节能算法GEDT(Globle Energy-Deadline Tradeoff).该算法通过最优松弛系数的计算,约束处理器在运行不同任务时降低频率的幅度.实验仿真结果显示,在满足任务最迟截止时间的同时,GEDT算法具有较优的节能效果.  相似文献   
7.
本文将介绍相关多媒体处理器的电源管理技术原理,以及如何利用这些技术降低功耗,并讨论采用哪些外部电源管理器件和功率IC可确保处理器芯片全面发挥省电特性.  相似文献   
8.
With increasing number of cores being integrated on a single die, Network-on-Chips (NoCs) have become the de-facto standard in providing scalable communication backbones for these multi-core chips. NoCs have a significant impact on the system’s performance, power and reliability. However, NoCs can be plagued by higher power consumption and degraded throughput if the network and router are not designed properly. Towards this end, this paper proposes a novel router architecture, where we tune the frequency of a router in response to network load to manage both performance and power. We propose three dynamic frequency tuning techniques, FreqBoost, FreqThrtl and FreqTune, targeted at congestion and power management in NoCs. We also propose and evaluate a novel fine-grained frequency tuning scheme where we vary the number of virtual-channels in a router dynamically. As a further optimization to these schemes, we propose a frequency tuning scheme where we tune the frequency of the four ports of a mesh router separately from the local port. As enablers for these techniques, we exploit Dynamic Voltage and Frequency Scaling (DVFS) and the imbalance in a generic router pipeline through time stealing. We also evaluate and analyze the proposed schemes from the point of view of reliability against soft error vulnerability and provide guidelines in choosing the appropriate scheme when reliability is the prime design constraint.Experiments using synthetic workloads on an 8 × 8 wormhole-switched mesh interconnect show that FreqBoost is a better choice for reducing average latency (maximum 40%) while, FreqThrtl provides the maximum benefits in terms of power saving and energy delay product (EDP). The FreqTune scheme is a better candidate for optimizing both performance and power, achieving on an average 36% reduction in latency, 13% savings in power (up to 24% at high load), and 40% savings (up to 70% at high load) in EDP. With application benchmarks, we observe IPC improvement up to 23% using our design. Our analysis shows FreqBoost to be the most robust scheme amongst the three schemes when reliability is a concern.  相似文献   
9.
数据中心以可接受的成本承载着超大规模的互联网应用.数据中心的能源消耗直接影响着数据中心的一次性建造成本和长期维护成本,是数据中心总体持有成本的重要组成部分.现代的数据中心普遍采用DVFS(Dynamic Voltage Frequency Scaling,动态电压频率调节)来提升单节点的能耗表现.但是,DVFS这一类机制同时影响应用的能源消耗和性能,而这一问题尚未被深入探索.本文专注于DVFS机制对应用程序性能的影响,提出了一个分析模型用来量化地刻画应用程序的性能同处理器频率之间的关系,可以预测程序在任意频率下的性能.具体来说,依据执行时访问内存子系统资源的不同,本文把程序的指令为两部分:片上指令和片外指令,并分别独立建模.片上指令指仅需访问片上资源就可以完成执行的指令,其执行时间同处理器频率成线性关系;片外指令指需要访问主存的指令,其执行时间同处理器频率无关.通过上述划分和对每部分执行时间的分别建模,我们可以获得应用程序的执行时间同处理器频率之间的量化模型.我们使用两个不同的平台和SPEC 2006中的所有标准程序验证该模型,平均误差不超过1.34%.  相似文献   
10.
异构多核作为嵌入式处理器架构的发展趋势,在处理复杂的视频编解码运算上具有强大的优势。但在实际应用中,多核所带来的能耗问题是其不得不面对的瓶颈。为克服这一问题,提出一种针对H.264的动态电压频率调节算法,通过对数据帧的解码工作负载进行预测,动态调整处理器的电压和频率,最终实现降低能耗的目的。实验结果证明,该算法至少可以降低处理器20%的能耗。  相似文献   
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号