Synchronous Full-Scan for Asynchronous Handshake Circuits

Handshake circuits form a special class of asynchronous circuits that has enabled the industrial exploitation of the asynchronous potential such as low power, low electromagnetic emission, and increased cryptographic security. In this paper we present a test solution for handshake circuits that brings synchronous test-quality to asynchronous circuits. We add a synchronous mode of operation to handshake circuits that allows full controllability and observability during test. This technique is demonstrated on some industrial examples and gives over 99% stuck-at fault coverage, using test-pattern generators developed for synchronous circuits. The paper describes how such a full-scan mode can be achieved, including an approach to minimize the number of dummy latches in case latches are used in the data path of the handshake circuit.     

就地补偿在动力厂水泵电机上的应用实例

就我公司动力厂给水车间155kW水泵电机无功就地补偿的可行性及经济效益进行了分析和研究，对工厂用电如何节能降耗有一定的参考价值。     

一种考虑不同期合闸的行波合闸保护新方法

当线路末端故障时，行波在线路末端的反射情况比较复杂，反向电流行波的极性有可能与正向电流行波的极性相反，而此时测距结果又与线路无故障时相同。因此，会造成行波测距式与行波极性比较式合闸保护的不正确动作。根据行波的折、反射理论，分析出当线路无故障时正向电流行波仅在线路末端发生反射，且电流行波的反射系数为-1，而当线路存在故障时，正向电流行波将在故障点发生反射，无论故障是否在线路末端，电流行波的反射系数都不会是-1。根据这一特征，提出了一种新的行波合闸保护方法。从原理上保证了在各种情况下保护都可以正确动作，大量的电磁暂态仿真结果也证明了这一点。     

自适应RBF神经网络在CDMA移动通信上行链路功率控制中的应用研究

提出了一种自适应RBF神经网络功率控制方案。详细研究了该网络在DS-CDMA通信中，进行上行链路闭环功率控制(基于信扰比(SIR))的应用理论，给出了该网络参数的计算方法。最后用计算机仿真法模拟出该控制器的运行性能。结果表明基于SIR的自适应RBF神经网络功率控制器能自适应地调整移动台的发射功率，使基站接收信号的信扰比始终非常接近于一个常数，且有比定步长功率控制更小的SIR跟踪误差，从而可以降低接收信号的中断概率、提高信道容量。     

Locked discrete event systems: How to model and how to unlock

To model qualitative aspects of discrete event systems, i.e., the order of the events is of sole importance, we use a triple consisting of the set of all possible events (the alphabet), the set of all behavior (possible strings of events), and the set of all tasks (completed behavior). We use this view to model synchronous as well as asynchronous connection of systems. Moreover, it is easy to define notions like deadlock and livelock in this view. We give a method to construct a second system that, in connection with the original system, gets rid of its deadlock and/or livelock. A state-space representation is introduced. In this representation computations can be done effectively.     

异步时序型PAL解析方法的研究及解析结果分析

本文就异步时序现ＰＡＬ的解析，提出了一种状态图遍历算法。     

异步电机性能微机测试系统设计

结合工程实际介绍了异步电机计算机辅助测试（CAT）系统的硬件、软件组成、技术方案确定以及设计原则。现场运行表明，该系统稳定可靠，且具有较高的性能价格比。     

基于LabWindows/CVI的多线程测控软件设计技术

多线程技术是W in32操作系统的一项重要软件技术。CVI 6.0及其以后版本提供了线程池和异步定时器两种多线程运行机制,为测控软件的设计开发带来了一次技术飞跃。文中结合测控软件设计实例,详细介绍了在CVI平台下多线程编程技术的应用方法。     

Signals,timers, and continuations for multithreaded user‐level protocols

Precise timing and asynchronous I/O are appealing features for many applications. Unix kernels provide such features on a per‐process basis, using signals to communicate asynchronous events to applications. Per‐process signals and timers are grossly inadequate for complex multithreaded applications that require per‐thread signals and timers that operate at finer granularity. To respond to this need, we present a scheme that integrates asynchronous (Unix) signals with user‐level threads, using the ARIADNE system as a platform. This is done with a view towards support for portable, multithreaded, and multiprotocol distributed applications, namely the CLAM (connectionless, lightweight, and multiway) communications library. In the same context, we propose the use of continuations as an efficient mechanism for reducing thread context‐switching and busy‐wait overheads in multithreaded protocols. Our proposal for integrating timers and signal‐handling mechanisms not only solves problems related to race conditions, but also offers an efficient and flexible interface for timing and signalling threads. Copyright © 2006 John Wiley & Sons, Ltd.