Rethinking Enterprise Architecture for Sustainable Energy System Development

The development of a sustainable energy system throughout an enterprise is a complex task, which requires an agile holistic approach. Such an approach needs to include a variety of objectives including energy strategy formation and strategic decision-making, which are directly related to the analysis and management of the main areas of sustainable development:The economic, technological, environmental, and social. These multidimensional requirements of sustainability are often difficult to achieve within the enterprise, because these aspects are interrelated and influenced by various internal and external environment factors. This paper first reviews the main challenges for an energy system, and then demonstrates how a strategic agile enterprise architecture driven approach could effectively guide the sustainable energy system development. The study presented in this paper provides a holistic approach that contributes to the advancement and usage of literature dealing with issues of sustainable energy system development and agile enterprise architecture, which has not been discussed before to any great extent.     

Resistive switching characteristics of ZnO–graphene quantum dots and their use as an active component of an organic memory cell with one diode-one resistor architecture

We investigated the resistive switching characteristics of a polystyrene:ZnO–graphene quantum dots system and its potential application in a one diode-one resistor architecture of an organic memory cell. The log–log I–V plot and the temperature-variable I–V measurements revealed that the switching mechanism in a low-current state is closely related to thermally activated transport. The turn-on process was induced by a space-charge-limited current mechanism resulted from the ZnO–graphene quantum dots acting as charge trap sites, and charge transfer through filamentary path. The memory device with a diode presented a ∼10³ I_ON/I_OFF ratio, stable endurance cycles (10² cycles) and retention times (10⁴ s), and uniform cell-to-cell switching. The one diode-one resistor architecture can effectively reduce cross-talk issue and realize a cross bar array as large as ∼3 kbit in the readout margin estimation. Furthermore, a specific word was encoded using the standard ASCII character code.     

Combined hardware–software multi-parallel prefiltering on the Convey HC-1 for fast homology detection

Protein databases used in research are huge and still grow at a fast pace. Many comparisons need to be done when searching similar (homologous) sequences for a given query sequence in these databases. Comparing a query sequence against all sequences of a huge database using the well-known Smith–Waterman algorithm is very time-consuming. Hidden Markov Models pose an opportunity for reducing the number of entries of a database and also enable to find distantly homologous sequences. Fewer entries are achieved by clustering similar sequences in a Hidden Markov Model. Such an approach is used by the bioinformatics tool HHblits. To further reduce the runtime, HHblits uses two-level prefiltering to reduce the number of time-consuming Viterbi comparisons. Still, prefiltering is very time-consuming. Highly parallel architectures and huge bandwidth are required for processing and transferring the massive amounts of data. In this article, we present an approach exploiting the reconfigurable, hybrid computer architecture Convey HC-1 for migrating the most time-consuming part. The Convey HC-1 with four FPGAs and high memory bandwidth of up to 76.8 GB/s serves as the platform of choice. Other bioinformatics applications have already been successfully supported by the HC-1. Limited by FPGA size only, we present a design that calculates four first-level prefiltering scores per FPGA concurrently, i.e. 16 calculations in total. This score calculation for the query profile against database sequences is done by a modified Smith–Waterman scheme that is internally parallelized 128 times in contrast to the original Streaming ‘Single Instruction Multiple Data (SIMD)’ Extensions (SSE)-supported implementation where only 16-fold parallelism can be exploited and where memory bandwidth poses the limiting factor. Preloading the query profile, we are able to transform the memory-bound implementation to a compute- and resource-bound FPGA design. We tightly integrated the FPGA-based coprocessor into the hybrid computing system by employing task-parallelism for the two-level prefiltering. Despite much lower clock rates, the FPGAs outperform SSE-based execution for the calculation of the prefiltering scores by a factor of 7.9.     

浅析高校新校区选址主要影响因素

从政策、城市与区域规划、环境、文化及其传承因素、基础设施等方面探析了高校新校区选址有关的主要影响因素，以满足高等学校大规模的扩建要求，促进高等教育的发展。     

电信企业信息化统一模型构建策略

电信企业信息化的实质就是赋予电信企业精细化的企业资源整合能力，本以此认识为出发点，通过定义基本的信息化业务元素，需求参数和基本信息处理机制，构建出带有行业共性的电信企业信息化统一模型，该模型针对目前电信企业信息化中常见的和潜在的问题提供了有效的解决措施。     

ADIC iPlatform智能磁带库体系结构

本文介绍了ADIC iPlatform智能磁带库体系结构。     

Windows2000环境下实时控制系统的软件实现

文章介绍了在windows2000环境下通过编写WDM（Windows Driver Model）设备驱动程序实现实时数据采集和控制的一种方法。采用研华数据采集卡PCL818L产生中断信号．通过编写WDM驱动程序实现了在windows2000环境下转台的位置控制。并在实验中调试通过。实验结果表明：在采样频率为1KHz的情况下。控制系统很好实现了输出对输入的跟踪，证明了采用方法的正确性。该方法解决了windows2000环境下的实时性问题，为在windows环境下实时控制系统的实现提供了有益的尝试。     

协同作战能力简析

协同作战能力(CEC)是一种充分利用网络技术的新型海岸防空技术，给系统的作战能力带来了革命性的交破。本文对协同作战能力的产生、功能、组成以及未来的发展趋势作了详细的介绍，阐述了CEC系统的总体设计思想。在此基础上，将CEC系统与传统的作战系统的性能和设计思想在各方面进行了比较，交出了CEC系统各方面的优越性能。协同作战能力是现代和未来作战系统的发展方向，CEC系统的发展必将成为衡量各国国防科技现代化的重要指标。