Rethinking Enterprise Architecture for Sustainable Energy System Development

The development of a sustainable energy system throughout an enterprise is a complex task, which requires an agile holistic approach. Such an approach needs to include a variety of objectives including energy strategy formation and strategic decision-making, which are directly related to the analysis and management of the main areas of sustainable development:The economic, technological, environmental, and social. These multidimensional requirements of sustainability are often difficult to achieve within the enterprise, because these aspects are interrelated and influenced by various internal and external environment factors. This paper first reviews the main challenges for an energy system, and then demonstrates how a strategic agile enterprise architecture driven approach could effectively guide the sustainable energy system development. The study presented in this paper provides a holistic approach that contributes to the advancement and usage of literature dealing with issues of sustainable energy system development and agile enterprise architecture, which has not been discussed before to any great extent.     

Resistive switching characteristics of ZnO–graphene quantum dots and their use as an active component of an organic memory cell with one diode-one resistor architecture

We investigated the resistive switching characteristics of a polystyrene:ZnO–graphene quantum dots system and its potential application in a one diode-one resistor architecture of an organic memory cell. The log–log I–V plot and the temperature-variable I–V measurements revealed that the switching mechanism in a low-current state is closely related to thermally activated transport. The turn-on process was induced by a space-charge-limited current mechanism resulted from the ZnO–graphene quantum dots acting as charge trap sites, and charge transfer through filamentary path. The memory device with a diode presented a ∼10³ I_ON/I_OFF ratio, stable endurance cycles (10² cycles) and retention times (10⁴ s), and uniform cell-to-cell switching. The one diode-one resistor architecture can effectively reduce cross-talk issue and realize a cross bar array as large as ∼3 kbit in the readout margin estimation. Furthermore, a specific word was encoded using the standard ASCII character code.     

Combined hardware–software multi-parallel prefiltering on the Convey HC-1 for fast homology detection

Protein databases used in research are huge and still grow at a fast pace. Many comparisons need to be done when searching similar (homologous) sequences for a given query sequence in these databases. Comparing a query sequence against all sequences of a huge database using the well-known Smith–Waterman algorithm is very time-consuming. Hidden Markov Models pose an opportunity for reducing the number of entries of a database and also enable to find distantly homologous sequences. Fewer entries are achieved by clustering similar sequences in a Hidden Markov Model. Such an approach is used by the bioinformatics tool HHblits. To further reduce the runtime, HHblits uses two-level prefiltering to reduce the number of time-consuming Viterbi comparisons. Still, prefiltering is very time-consuming. Highly parallel architectures and huge bandwidth are required for processing and transferring the massive amounts of data. In this article, we present an approach exploiting the reconfigurable, hybrid computer architecture Convey HC-1 for migrating the most time-consuming part. The Convey HC-1 with four FPGAs and high memory bandwidth of up to 76.8 GB/s serves as the platform of choice. Other bioinformatics applications have already been successfully supported by the HC-1. Limited by FPGA size only, we present a design that calculates four first-level prefiltering scores per FPGA concurrently, i.e. 16 calculations in total. This score calculation for the query profile against database sequences is done by a modified Smith–Waterman scheme that is internally parallelized 128 times in contrast to the original Streaming ‘Single Instruction Multiple Data (SIMD)’ Extensions (SSE)-supported implementation where only 16-fold parallelism can be exploited and where memory bandwidth poses the limiting factor. Preloading the query profile, we are able to transform the memory-bound implementation to a compute- and resource-bound FPGA design. We tightly integrated the FPGA-based coprocessor into the hybrid computing system by employing task-parallelism for the two-level prefiltering. Despite much lower clock rates, the FPGAs outperform SSE-based execution for the calculation of the prefiltering scores by a factor of 7.9.     

SIMPLIS环境中开关电源集成电路控制器模型的开发及应用

介绍现代开关电源行业仿真工作的意义和现状,以及专用仿真软件包SIM etrix/SIMPLIS的优点和不足。通过实例给出SIMPLIS环境中集成电路控制芯片的建模过程,并就其中的关键技术予以简单讨论。     

ADIC iPlatform智能磁带库体系结构

本文介绍了ADIC iPlatform智能磁带库体系结构。     

浅谈计算软件的开发

软件开发重要的是 :确定编程语言 ,代码设计 ,程序设计 ,软件试验 ,人员培训等步骤     

协同作战能力简析

协同作战能力(CEC)是一种充分利用网络技术的新型海岸防空技术，给系统的作战能力带来了革命性的交破。本文对协同作战能力的产生、功能、组成以及未来的发展趋势作了详细的介绍，阐述了CEC系统的总体设计思想。在此基础上，将CEC系统与传统的作战系统的性能和设计思想在各方面进行了比较，交出了CEC系统各方面的优越性能。协同作战能力是现代和未来作战系统的发展方向，CEC系统的发展必将成为衡量各国国防科技现代化的重要指标。     

古陶片年龄与烧结温度测定中的计算机模拟

介绍用已知年龄和烧结温度的古陶片穆斯堡尔超精细参数与年龄和烧结温度的实验关系曲线作基础，应用计算机模拟程序，自动求出未知陶片的年龄和最高烧结温度的方法。     

基于工作站和EUCLID-IS的计算机组装结构CAD系统研究

随着集成电路技术的发展及计算机性能的不断提高，计算机组装结构设计在计算机，总体设计中的地位越来越重要，它直接影响到计算机性能的提高。本文针对一个基于工作站和ＥＵＣＬＩＤ－ＩＳ软件的电子计算机组结构ＣＡＤ系统，从软、硬件平台，系统功能及实现等方面进行了讨论，旨在为电子计算机组装结构设计提供一种强有力的、方便的设计工具，有利于增强国产计算机的市场竞争能力。