逻辑程序的一种并行执行模型

本文基于静态相关性分析和动态调整相结合的方法，提出了一种逻辑程序的执行模型，它不仅开发了“与“并行，同进也开发了一定的“或“并行，从而有效地加速了逻辑程序的执行。     

GIS中矢量图形的结构分析与VC++中的实现

简要讨论了GIS各类矢量图形元素间的空间拓朴结构及基位置关系 ,并用VC 6 . 0及MFC具体分析了圆弧与多边形区域的相交关系及实现。为利用VC开发专用图形软件提供了有用帮助。     

Real-world extensions to scheduling algorithms based on lagrangian relaxation

Recently, efficient scheduling algorithms based on Lagrangian relaxation have been proposed for scheduling parallel machine systems and job shops. In this article, we develop real-world extensions to these scheduling methods. In the first part of the paper, we consider the problem of scheduling single operation jobs on parallel identical machines and extend the methodology to handle multiple classes of jobs, taking into account setup times and setup costs. The proposed methodology uses Lagrangian relaxation and simulated annealing in a hybrid framework. In the second part of the paper, we consider a Lagrangian relaxation based method for scheduling job shops and extend it to obtain a scheduling methodology for a real-world flexible manufacturing system with centralized material handling. This research was supported in part by the Office of Naval Research and the Department of Science and Technology grant N00014-93-1017.     

表面引发剂对熔融铝合金直接氧化生长的影响

为了控制熔融铝合金直接氧化法制备Al2O3/Al复合材料的氧化生长,采用ZnO,SiO2和MgO3种表面引发剂,研究它们对Al-Si-Zn合金氧化生长过程及Al2O3/Al复合材料组织形貌的影响.结果表明:与未使用引发剂时相比,使用SiO2,ZnO或MgO表面引发剂制备的粉末都能显著地缩短Al-Si-Zn合金的氧化生长孕育期,提高合金氧化生长速率,改善复合材料的胞状生长方式,提高复合材料的组织均匀度和致密度,为实际生产应用提供了依据.实验发现:ZnO表面引发剂的使用效果最为突出,其最佳添加量为12mg/cm2.     

转移法色交换

将图Ｇ的着色由一种变为中一种，通常用Ｋｅｍｐｅ法以交换。但是，对于某些情况，用此法无效。针对这个问题，本文提出了一种转移法色交换，它适用于平面图着色，方法直观，清晰且有效。     

Energy minimization and design for testability

The problem of fault detection in general combinational circuits is NP-complete. The only previous result on identifying easily testable circuits is due to Fujiwara who gave a polynomial time algorithm for detecting any single stuck fault inK-bounded circuits. Such circuits may only contain logic blocks with no more thanK input lines and the blocks are so connected that there is no reconvergent fanout among them. We introduce a new class of combinational circuits called the (k, K)-circuits and present a polynomial time algorithm to detect any single or multiple stuck fault in such circuits. We represent the circuit as an undirected graphG with a vertex for each gate and an edge between a pair of vertices whenever the corresponding gates have a connection. For a (k, K)-circuit,G is a subgraph of ak-tree, which, by definition, cannot have a clique of size greater thank+1. Basically, this is a restriction on gate interconnections rather than on the function of gates comprising the circuit. The (k, K)-circuits are a generalization of Fujiwara'sK-bounded circuits. Using the bidirectional neural network model of the circuit and the energy function minimization formulation of the fault detection problem, we present a test generation algorithm for single and multiple faults in (k, K)-circuits. This polynomial time aggorithm minimizes the energy function by recursively eliminating the variables.