立方相SiC MEMS器件研究进展

主要介绍了近年来国内外出现的有市场推广潜力的立方相碳化硅(3C-SiC)MEMS器件,详细描述了其中一些典型器件的基本结构、加工工艺及初步测试结果,并指出了要想提高器件的可靠性,需要获得低残余应力、低应力梯度的薄膜材料,应当采用合适的刻蚀方法,还需保证金属与碳化硅欧姆接触的稳定性,同时高温引线键合与封装工艺亦不能忽视。随着材料生长和加工成本的不断降低,3C-SiC基MEMS器件将会逐步走向商品化。     

退火工艺对Al离子注入的4H-SiC表面形貌的影响

通过应用多次Al离子注入和CVD中的高温退火技术,在SiC片表面形成了p型层。p型层中各深度下Al的浓度均为110¹⁹cm^-3,层厚为550nm。本文应用三种不同的退火工艺对注入后的SiC进行退火。通过测量和比较表面粗糙度,发现通过石墨层覆盖来保护表面的退火工艺可以很好的阻止SiC表面在高温退火下的粗化,粗糙度保持在3.8nm。通过其他两种(在氩气保护下、在SiC保护片的覆盖下)退火工艺退火所得到的表面有明显的台阶,粗糙度分别为12.2nm和6.6nm。     

Effect of annealing process on the surface roughness in multiple Al implanted 4H-SiC

A P-layer can be formed on a SiC wafer surface by using multiple Al ion implantations and post-implantation annealing in a low pressure CVD reactor.The Al depth profile was almost box shaped with a height of 1×10¹⁹cm^-3 and a depth of 550 nm.Three different annealing processes were developed to protect the wafer surface.Variations in RMS roughness have been measured and compared with each other.The implanted SiC, annealed with a carbon cap,maintains a high-quality surface with an RMS roughness as low as 3.8 nm.Macrosteps and terraces were found in the SiC surface,which annealed by the other two processes（protect in Ar/protect with SiC capped wafer in Ar）.The RMS roughness is 12.2 nm and 6.6 nm,respectively.     

Multi-wafer 3C-SiC thin films grown on Si(100) in a vertical HWLPCVD reactor

We report the latest results of the 3C-SiC layer growth on Si(100)substrates by employing a novel home-made horizontal hot wall low pressure chemical vapour deposition(HWLPCVD)system with a rotating susceptor that was designed to support up to three 50 mm-diameter wafers.3C-SiC film properties of the intrawafer and the wafer-to-wafer,including crystalline morphologies and electronics,are characterized systematically. Intra-wafer layer thickness and sheet resistance uniformity(σ/mean)of～3.40%and～5.37%have been achieved in the 3×50 mm configuration.Within a run,the deviations of wafer-to-wafer thickness and sheet resistance are less than 4%and 4.24%,respectively.     

碳化硅功率器件与新能源汽车

<正>一、SiC功率器件的发展背景随着全球经济和技术的蓬勃发展,能源消耗逐年增加。目前,全球的二氧化碳(CO2)排放中有25%来源于汽车。有报告指出,截至2030年,全球CO2排放量将增至423亿t。在我国,汽车排放带来的污染已经成为城市大气污染中的主要因素之一,我国的CO2排放目前已居全球第2,节能减排已成为汽车业发展的重大课题。因此,发展新能源汽车是实现节能减排及我国汽车产业跨越式和可持续发展的必然战略措施。     

4H—SiC同质外延层中的扩展缺陷研究

利用自主研发的热壁低压化学气相沉积(HWLPCVD)系统,在5.08 cm(2英寸)4°偏轴4H-SiC衬底上生长4H-SiC同质外延膜。讨论了4H-SiC同质外延层中的两种扩展缺陷——彗星缺陷和胡萝卜缺陷,研究了这两种缺陷的起源与消除方法。研究发现采用化学机械抛光(CMP)方法可以有效去除扩展缺陷,提高外延膜的质量。另外,提高衬底质量和优化生长条件也可以消除这两种扩展缺陷。     

利用垂直热壁CVD法快速生长高质量的4H-SiC同质外延膜

利用新改进的垂直低压热壁CVD 设备,应用TCS 和C2H4 分别作为Si 源和C 源,在偏8°晶向的4H-SiC 衬底上生长出了高质量的外延膜。当生长温度在1500℃到1530℃之间时,生长速率达到了25-30μm/h。50μm 厚的外延膜（生长2 小时）的结晶质量和表面粗糙度和薄的外延膜（生长30 分钟）相比均没有发生恶化。外延膜的背景掺杂浓度下降到了2.13×1015cm-3。另外,本文还研究了C/Si 对生长速率和外延膜结晶质量的影响。     

多片垂直HWLPCVD系统生长的3C-SiC异质外延膜的研究

文章报道了利用我们自主研发的垂直多片HWLPCVD系统,在Si(100)衬底上获得的3C-SiC异质外延膜的最新结果。多片HWLPCVD系统最多可容纳3个直径为50mm的晶片,托盘可旋转。实验系统研究了3C-SiC外延膜的片内和片间均匀性,包括结晶质量,厚度和电学特性。片内厚度和方块电阻均匀性（标准差/平均值）最好可达3.40%和5.37%,片间厚度和方块电阻均匀性最好可达4.00%和4.24%。     

High-quality homoepitaxial layers grown on 4H-SiC at a high growth rate by vertical LPCVD

High quality,homoepitaxial layers of 4H-SiC were grown on off-oriented 4H-SiC（0001） Si planes in a vertical low-pressure hot-wall CVD system（LPCVD） by using trichlorosilane（TCS） as a silicon precursor source together with ethylene（C₂H₄） as a carbon precursor source.The growth rate of 25-30μm/h has been achieved at lower temperatures between 1500 and 1530℃.The surface roughness and crystalline quality of 50μm thick epitaxial layers（grown for 2 h） did not deteriorate compared with the corresponding results of thinner layers（grown for 30 min）.The background doping concentration was reduced to 2.13×10¹⁵ cm^-3.The effect of the C/Si ratio in the gas phase on growth rate and quality of the epi-layers was investigated.