一种用于电流型电化学传感器的CMOS模拟前端芯片

本文提出了一种用于电流型电化学传感器的CMOS模拟前端芯片,芯片具有高度可编程性,其内部集成了可通过I2C接口总线与外部控制芯片通信的可配置数字模块电路。结合incremental型sigma-delta模数转换器与数字域相关双采样技术,提出并实现了一种新的两次采样的系统架构。该芯片基于华虹宏力0.18μm标准CMOS工艺流片,消耗芯片面积为1.3 mm × 1.9 mm,测试结果表明：该芯片16位数字输出具有高精度,高线性度特性,可检测溶液中磷酸根离子浓度的精度为0.01 mg/L。     

A CMOS detection chip for amperometric sensors with chopper stabilized incremental ΔΣ ADC

This paper presents a low noise complimentary metal-oxide-semiconductor (CMOS) detection chip for amperometric electrochemical sensors. In order to effectively remove the input offset of the cascaded integrators and the low frequency noise in the modulator, a novel offset cancellation chopping scheme was proposed in the Incremental Δ Σ analog to digital converter (IADC). A novel low power potentiostat was employed in this chip to provide the biasing voltage for the sensor while mirroring the sensor current out for detection. The chip communicates with FPGA through standard built in I2C interface and SPI bus. Fabricated in 0.18-μm CMOS process, this chip detects current signal with high accuracy and high linearity. A prototype microsystem was produced to verify the detection chip performance with current input as well as micro-sensors.     

全差分环形放大器的流水线模数转换器设计

为了实现低功耗流水线模数转换器,本文提出了一种新型全差分环形放大器,并基于它设计了一款10 bit40 MS/s流水线模数转换器。本文采用HHGRACE 0. 18μm 1P6M混合信号工艺完成电路设计,当差分输入频率为2. 001 95 MHz的正弦信号时,仿真得到有效位数为9. 74位,最大微分非线性±0. 5LSB,最大积分非线性为±0. 65 LSB,整个ADC功耗为5. 32 m W,实现了低功耗模数转换器的设计。     

一种亚阈值MOS管低功耗基准电压源

设计了一种基于亚阈值区MOS管的低功耗基准电压源。利用MOS管差分对的栅源电压差对MOS管的栅源电压进行温度补偿,从而得到基准输出电压。采用0.18 μm 混合信号CMOS工艺进行设计与仿真。结果表明,该基准电压源的最小工作电压为1.25 V,在0 ℃~80 ℃温度范围内的温度系数为6.096×10-5/℃。     

一种低功耗曲率补偿带隙基准电压源

设计了一种低功耗曲率补偿带隙基准电压源。利用亚阈值MOS管差分对,产生曲率补偿电流,对输出基准电压进行曲率补偿。采用低功耗运放来增强基准电压源的电源抑制能力,同时降低基准电压源的功耗。采用SMIC 0.18 μm 混合信号CMOS工艺进行设计。仿真结果表明,在1.5 V电源电压下,基准电压源的输出基准电压为1.224 V,在-40 ℃~125 ℃范围内的温度系数为1.440×10-6/℃~4.076×10-6/℃,电源抑制比为-77.58 dB,消耗电流为225.54 nA。     

A low jitter supply regulated charge pump PLL with self-calibration

This paper describes a ring oscillator based low jitter charge pump PLL with supply regulation and digital calibration. In order to combat power supply noise, a low drop output voltage regulator is implemented. The VCO gain is tunable by using the 4 bit control self-calibration technique. So that the optimal VCO gain is automatically selected and the process/temperature variation is compensated. Fabricated in the 0.13 μ m CMOS process, the PLL achieves a frequency range of 100-400 MHz and occupies a 190×200 μ m² area. The measured RMS jitter is 5.36 ps at a 400 MHz operating frequency.     

一种消除失调电压的增量型Σ-Δ调制器

基于增量型Σ-Δ调制器理论,利用Matlab的Simulink仿真工具,建立了考虑非理想因素的3阶前馈式增量型Σ-Δ调制器系统模型,并进行了仿真。仿真结果显示,信号噪声比达到98.2 dB,有效输出位达到16.02位。引入消除失调电压的技术后,基于宏力半导体0.18 μm标准CMOS工艺,对3阶前馈式增量型Σ-Δ调制器进行电路和版图设计,Spice后仿真结果显示,信号噪声比达到92.79 dB,有效输出位达到15.12位。