排序方式: 共有17条查询结果,搜索用时 19 毫秒
1.
Bellens R. de Schrijver E. Van den Bosch G. Groeseneken G. Heremans P. Maes H.E. 《Electron Devices, IEEE Transactions on》1994,41(3):413-419
A continued fast interface trap generation is observed in n-channel MOS transistors after termination of the hot-carrier stress. The magnitude of this post-stress effect is strongly dependent on the conditions of the preceding stress, on the post-stress conditions and on the process parameters. For measurements at 293 K, a simple model is proposed which is based on the release of hydrogen by the thermal detrapping of holes, and which can explain the observed dependencies. The importance of the post-stress Dit-generation is illustrated for the case of dynamic stress conditions where it can lead to an apparently deviating degradation behavior 相似文献
2.
The channel-length dependence of lifetime plots is analyzed. It is shown that no unique τ*I d versus I sub/I d relation can be obtained when threshold-voltage shifts are used for measuring the lifetime. In contrast, when using charge pumping as a monitor for the degradation, the lifetime plot for a given technology proves to be independent of the channel length 相似文献
3.
Bellens R. Van den Bosch G. Habas P. Mieville J.-P. Badenes G. Clerix A. Groeseneken G. Deferm L. Maes H.E. 《Electron Devices, IEEE Transactions on》1996,43(9):1407-1415
The electrical performance and the hot-carrier degradation behavior of a new type of fully overlapped device called FOND (Fully Overlapped Nitride-etch defined Device) is analyzed and compared to that of conventional LDD devices. Similar current driveability is found for the FOND devices compared to conventional LDD devices although in the FOND device significantly smaller concentrations are used for the lightly doped n--regions. For the overlapped device, a higher gate and overlap capacitance is found, originating from a larger poly length and self-alignment of the junction implant to the poly. For identical voltage conditions, this is reflected in a somewhat lower ring oscillator speed, compared to the LDD case. Concerning reliability, it is shown that deep submicron FOND devices can easily exceed the lifetime of the conventional LDD devices by two orders of magnitude. Based on experimental and simulation results, this higher hot-carrier resistance is explained by a smaller hot-carrier generation and a lower sensitivity of the overlapped device to hot-carrier damage. For the nMOS transistors, the lower generation of damage is the result of the lower lateral electric field due to the low n- concentration and the overlap of the polysilicon gate on the n- region while the suppressed sensitivity is due to the complete overlap. Compared to LDD devices, the use of fully overlapped devices creates a wider process and reliability margin that can be used to optimize other electrical parameters 相似文献
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5.
New insights in the relation between electron trap generation andthe statistical properties of oxide breakdown 总被引:1,自引:0,他引:1
Degraeve R. Groeseneken G. Bellens R. Ogier J.L. Depas M. Roussel P.J. Maes H.E. 《Electron Devices, IEEE Transactions on》1998,45(4):904-911
In this paper it is demonstrated in a wide stress field range that breakdown in thin oxide layers occurs as soon as a critical density of neutral electron traps in the oxide is reached. It is proven that this corresponds to a critical hole fluence, since a unique relationship between electron trap generation and hole fluence is found independent of stress field and oxide thickness. In this way literature models relating breakdown to hole fluence or to trap generation are linked. A new model for intrinsic breakdown, based on a percolation concept, is proposed. It is shown that this model can explain the experimentally observed statistical features of the breakdown distribution, such as the increasing spread of the QBD-distribution for ultrathin oxides. An important consequence of this large spread is the strong area dependence of the QBD for ultrathin oxides 相似文献
6.
Bellens R. Groeseneken G. Heremans P. Maes H.E. 《Electron Devices, IEEE Transactions on》1994,41(8):1421-1428
An in-depth study of the dynamic hot-carrier degradation behavior of N- and P-channel MOS transistors was performed based on the change of charge pumping and I-V characteristics. It is shown that for transistors with channel lengths ranging from 2 to 0.5 μm and frequencies up to 100 MHz the degradation under dynamic stress can completely be described as a quasi-static degradation, provided all static degradation effects are taken into account in the appropriate way. This means that the influence of post-stress effects and charge buildup or charge detrapping have to be considered 相似文献
7.
At present, submicron technologies, electrostatic discharges (ESD) are one of the major threats to the reliability of ICs. The aim of this paper is to demonstrate that a very good ESD protection level can be achieved provided we can insure a uniform triggering of multifinger NMOS protection devices. This can be done by a gate coupling to the drain, either by a capacitance or by a zener diode. Human body model (HBM) and charged device model (CDM) test results, as well as transmission line measurement (TLM) and light emission results support this finding. 相似文献
8.
Heremans P. Van den Bosch G. Bellens R. Groeseneken G. Maes H.E. 《Electron Devices, IEEE Transactions on》1990,37(4):980-993
The generation of fast interface traps due to channel hot-carrier injection in n-channel MOS transistors is investigated as a function of stress temperature. The relative importance of the mechanisms for the generation of fast interface traps by hot electrons and hot holes is shown to be independent of the temperature. In all cases the generation of fast interface traps is slightly reduced at lower temperatures. The degradation of transistor I d-V g characteristics, on the other hand, is strongly enhanced at lower temperatures. This is explained by a previously suggested model on the temperature dependence of the influence of the local narrow potential barrier, induced at the drain junction as a result of degradation, on the reverse-mode current characteristics. It is shown that only a minor part of the large current reduction at low temperatures can be ascribed to enhanced electron trapping 相似文献
9.
Lieven Meerpoel Dr. Jan Heeres Dr. Leo J. J. Backx Louis J. E. Van der Veken Rob Hendrickx David Corens Dr. Alex De Groot Dr. Stef Leurs Dr. Luc Van der Eycken Johan Weerts Paul Luyts Frans Van Gerven Filip A. A. Woestenborghs Andre Van Breda Michel Oris Pascal van Dorsselaer Gustaaf H. M. Willemsens Danny Bellens Patrick J. M. G. Marichal Dr. Hugo F. Vanden Bossche Frank C. Odds Prof. 《ChemMedChem》2010,5(5):757-769
Herein we describe the scalable diastereoselective and enantioselective syntheses of eight enantiomers of hydroxy metabolites of saperconazole. The in vitro antifungal activity of the eight stereoisomers (compounds 1 – 8 ) was compared against a broad panel of Candida spp. (n=93), Aspergillus spp. (n=10), Cryptococcus spp. (n=19), and dermatophytes (n=27). The four 2S isomers 1 – 4 of the new agent were generally slightly more active than the four 2R isomers 5 – 8 . All eight isomers were tested in a model of experimental A. fumigatus infection in guinea pigs by intravenous inoculation of the fungal conidia. Treatment doses were 1.25 mg kg?1 and 2.5 mg kg?1 per day. Infection severity was measured in terms of mean survival time (MST) after infection and mean tissue burdens in brain, liver, spleen, and kidney at postmortem examination. Among the eight isomers, the 2S diastereomers 1 – 4 showed a generally higher level of activity than the 2R diastereomers 5 – 8 , revealing compounds 1 and 4 as the most potent overall in eradicating tissue burden and MST. Compared with reference compounds itraconazole and saperconazole, the hydroxy isomers 1 – 8 are less potent inhibitors of the growth of A. fumigatus in vitro and of ergosterol biosynthesis in both A. fumigatus and C. albicans. 相似文献
10.
Bellens R. de Schrijver E. Groeseneken G. Keremans P. Maes H.E. 《Electron Device Letters, IEEE》1992,13(7):357-359
An apparently non-quasi-static degradation behavior is found for nMOS transistors that are dynamically stressed with conditions which favor hot-hole injection. This effect can be ascribed to a post-stress effect occurring during the waiting time between the different pulses. It is shown that this effect is of importance only when a net positive charge is built up during the stress. The deviating behavior under dynamic stress conditions can be predicted based on the measurement of the post-stress effect after a static degradation 相似文献