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排序方式: 共有24条查询结果,搜索用时 15 毫秒
1.
Small-signal and temperature noise model for MOSFETs   总被引:1,自引:0,他引:1  
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2.
A monolithically integrated clock recovery (CR) circuit making use of the phase-locked loop (PLL) circuit technique and enhancement/depletion AlGaAs/GaAs quantum well-high electron mobility transistors (QW-HEMT's) with gate lengths of 0.3 μm has been realized. A novel preprocessing circuit was used. In the PLL a fully-balanced varactorless VCO was applied. The VCO has a center oscillating frequency of about 7.7 GHz and a tuning range greater than 500 MHz. A satisfactory clock signal has been obtained at a bit rate of about 7.5 Gb/s. The power consumption is less than 200 mW at a supply voltage of -5 V  相似文献   
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4.
Basaran  U. Tao  R. Wu  L. Berroth  M. 《Electronics letters》2005,41(10):592-593
A K-band CMOS low-noise amplifier with a noise figure of 4.26 dB and a peak gain of 18.86 dB is presented. The low-noise amplifier has a peak gain frequency of 20.3 GHz and an input referred 1 dB compression point of -16 dBm. These are believed to be the lowest noise figure and highest gain values reported to date at these frequencies in a standard CMOS technology.  相似文献   
5.
A flexible method is presented, which enables the fabrication of porous as well as dense Si3N4/nano-SiC components by using Si3N4 powder and a preceramic polymer (polycarbosilazane) as alternative ceramic forming binder. The SiCN polymer benefits consolidation as well as shaping of the green body and partially fills the interstices between the Si3N4 particles. Cross-linking of the precursor at 300 °C increases the mechanical stability of the green bodies and facilitates near net shape machining. At first, pyrolysis leads to porous ceramic bodies. Finally, subsequent gas pressure sintering results in dense Si3N4/nano-SiC ceramics. Due to the high ceramic yield of the polycarbosilazane binder, the shrinkage during sintering is significantly reduced from 20 to 15 lin.%. Investigations of the sintered ceramics reveal, that the microstructure of the Si3N4 ceramic contains approx. 6 vol.% nano-scaled SiC segregations, which are located both at the grain boundaries and as inclusions in the Si3N4 grains.  相似文献   
6.
Tao  R. Berroth  M. 《Electronics letters》2004,40(23):1484-1486
A 10 GHz ring voltage controlled oscillator (VCO) has been designed and implemented in 0.12 /spl mu/m CMOS technology. A source capacitively coupled current amplifier (SC3A) is adopted to realise this VCO. It can operate from 8.4 GHz up to 10.6 GHz with a phase noise of about -85 dBc/Hz at 1 MHz frequency offset. With the 1.5 V supply voltage, the current consumption is about 35 mA.  相似文献   
7.
The first 1.3 μm monolithic integrated optoelectronic receiver using an InGaAs MSM photodiode and AlGaAs/GaAs HEMTs grown on a GaAs substrate has been fabricated. At differential output of the implemented multistage amplifier the transimpedance is 26.8 kΩ (into 50 Ω). The bandwidth of 430 MHz implies suitability for transmission rates up to 622 Mbit/s  相似文献   
8.
Metal-matrix composites (MMCs) were produced by activated pressureless infiltration of porous Al2O3 compacts with the presence of elemental titanium as an activator and steel (X38CrMoV5-1) as the metal matrix. The quality of infiltration was subsequently investigated by scanning electron microscopy (SEM) and energy-dispersive X-ray spectroscopy (EDX). The results show that poor quality of infiltration is associated with blocking of infiltration channels due to the formation of Ti-rich phases which are accumulated over infiltration depth. To prevent the pores blocking, a layer-graded activator green body in which the activator quantity is decreased with infiltration depth was used. Furthermore, it could be shown that the mechanism based on evaporation/condensation of metal onto activator particles is in agreement with the results of this study.  相似文献   
9.
A broadband amplifier chip based on AlGaAs/GaAs/AlGaAs quantum well FETs with 0.3 μm gate length has been designed and fabricated. The amplifier can be operated with single-ended or differential inputs with an input resistance of 50 Ω. The output signals are differential with both internal load resistances at 100 Ω, the chip area is 1×1 mm2, and the power consumption is ~375 mW  相似文献   
10.
A Wilkinson power divider operating not only at one frequency f/sub 0/, but also at its first harmonic 2f/sub 0/ is presented. This power divider consists of two branches of impedance transformer, each of which consists of two sections of 1/6-wave transmission-line with different characteristic impedance. The two outputs are connected through a resistor, an inductor, and a capacitor. All the features of a conventional Wilkinson power divider, such as an equal power split, impedance matching at all ports, and a good isolation between the two output ports, can be fulfilled at f/sub 0/ and 2f/sub 0/, simultaneously.  相似文献   
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