60 GHz Single-Chip Front-End MMICs and Systems for Multi-Gb/s Wireless Communication

Single-chip 60 GHz transmitter (TX) and receiver (RX) MMICs have been designed and characterized in a 0.15mum (f_T~ 120 GHz/f _MAX> 200 GHz) GaAs mHEMT MMIC process. This paper describes the second generation of single-chip TX and RX MMICs together with work on packaging (e.g., flip-chip) and system measurements. Compared to the first generation of the designs in a commercial pHEMT technology, the MMICs presented in this paper show the same high level of integration but occupy smaller chip area and have higher gain and output power at only half the DC power consumption. The system operates with a LO signal in the range of 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO multiplier chain, resulting in an IF center frequency of 2.5 GHz. Packaging and interconnects are discussed and as an alternative to wire bonding, flip-chip assembly tests are presented and discussed. System measurements are also described where bit error rate (BER) and eye diagrams are measured when the presented TX and RX MMICs transmits and receives a modulated signal. A data rate of 1.5 Gb/s with simple ASK modulation was achieved, restricted by the measurement setup rather than the TX and RX MMICs. These tests indicate that the presented MMICs are especially well suited for transmission and reception of wireless signals at data rates of several Gb/s     

Fully integrated 60-GHz single-ended resistive mixer in 90-nm CMOS technology

This letter presents the design and characterization of a fully integrated 60-GHz single-ended resistive mixer in a 90-nm CMOS technology. A conversion loss of 11.6dB, 1-dB compression point of 6dBm and IIP3 of 16.5dBm were measured with a local oscillator (LO) power of 4dBm and zero drain bias. The possibility of improvement in IIP3 with selective drain bias has been verified. A 3-dB improvement in IIP3 was obtained with 150-mV dc voltage applied at the drain. Microstrip transmission lines are used to realize matching and filtering at LO and radio frequency ports.     

90-nm CMOS for microwave power applications

We report, for the first time, the experimental evaluation of a very short channel 90-nm CMOS transistor under RF over-voltage conditions. At 9 GHz and 1.5 V supply a 40 /spl mu/m gate width device is able to deliver 370 mW/mm output power with a PAE of 42% and a transducer power gain of 15 dB. Measurement results at 3 and 6 GHz is also presented. The transistor does not show any degradation in either dc or RF performance after prolonged operation at 1 and 6 dB compression. Simulation show, that the peak voltage, V/sub ds/ at this condition is 3.0 V, while the maximum allowed dc supply voltage is limited by the design rules to 1.2 V. We show for the first time that nanometer-scale CMOS can be used for microwave power applications with severe RF over-voltage conditions without any observable degradation.     

Deep Submicron CMOS for Millimeter Wave Power Applications

This letter gives an early assessment of deep submicron planar bulk CMOS devices for millimeter wave power amplifier (PA) applications. Using load pull measurements, a record high power density of 100 mW/mm and a transducer gain of 7 dB at 35 GHz were achieved for a 40 nm physical gate length CMOS device with a total gate width of 192 mum. Furthermore a peak PAE of 33% was reached. This shows that 40 nm gate length CMOS is feasible for medium PAs in the millimeter wave region.     

The Matrix Balun—A Transistor-Based Module for Broadband Applications

In this paper the analysis and design of a new active balun with very broadband performance, the matrix balun, are reported. Measured results show a common mode rejection ratio, CMRR, larger than 15 dB between 4 and 42 GHz while exhibiting 2 dB single-ended gain with a ripple of 1 dB. The balun was realized in a 0.15 mum GaAs mHEMT process. It occupies a chip area of 0.63 mm² and consumes a dc power of 20 mW. The same matrix balun circuit may also be biased for amplification and used as a matrix amplifier. The circuit then exhibits 10.5 dB gain up to 63 GHz with 1 dB ripple above 5.5 GHz and a power consumption of 67 mW.     

Development of 60-GHz front-end circuits for a high-data-rate communication system

Recent results from a Swedish program for development of 60-GHz monolithic microwave integrated circuits (MMICs) for high-data-rate communication links are presented. Front-end circuits such as mixers, amplifiers, frequency multipliers, IF amplifiers with gain control, and voltage-controlled oscillators (VCOs) have been realized utilizing GaAs PHEMT and MHEMT technologies. A newly developed 7.5-GHz coupled Colpitt VCO shows a minimum phase noise of -95 dBc at 100 kHz offset. A second-harmonic 14-GHz VCO shows a minimum phase noise of less than -90 dBc at 100 kHz. A novel balanced 7-28-GHz MMIC frequency quadrupler is described and compared with a single-ended quadrupler at the same input frequencies. To demonstrate its feasibility and potential application, the quadrupler is combined with the Colpitt VCO and the output characteristics of the resulting 30-GHz MMIC source are measured. A three-stage MHEMT wide-band amplifier covering 43-64 GHz with a gain of 24 dB, a minimum noise figure of 2.5 dB, and a passband ripple of 2 dB is also described. In future 60-GHz systems for mass markets where cost is of utmost importance, Si-based technologies, especially CMOS, are highly interesting. Some recent circuit results based on a 90-nm CMOS technology are also reported.     

Balanced Colpitt oscillator MMICs designed for ultra-low phase noise

Balanced voltage-controlled oscillator (VCO) monolithic microwave integrated circuits (MMICs) based on a coupled Colpitt topology with a fully integrated tank are presented utilizing SiGe heterojunction bipolar transistor (HBT) and InGaP/GaAs HBT technologies. Minimum phase noise is obtained for all designs by optimization of the tank circuit including the varactor, maximizing the tank amplitude, and designing the VCO for Class C operation. Fundamental and second harmonic VCOs are evaluated. A minimum phase noise of less than -112 dBc at an output power of 5.5 dBm is achieved at 100-kHz carrier offset and 6.4-GHz oscillation frequency for the fundamental InGaP/GaAs HBT VCO. The second harmonic VCO achieves a minimum measured phase noise of -120 dBc at 100 kHz at 13 GHz. To our best knowledge, this is the lowest reported phase noise to date for a varactor-based VCO with a fully integrated tank. The fundamental frequency SiGe HBT oscillator achieves a phase noise of -108 dBc at 100 kHz at 5 GHz. All MMICs are fabricated in commercial foundry MMIC processes.