A low-noise fixed-tuned 300-360-GHz sub-harmonic mixer using planar Schottky diodes

This letter presents the design and fabrication of a low-noise fixed-tuned 300-360-GHz sub-harmonic mixer, featuring an anti-parallel pair of planar Schottky diodes fabricated by the University of Virginia and flip-chipped onto a suspended quartz-based microstrip circuit. The mixer exhibits a double side band (DSB) equivalent noise temperature lower than 900K over 18% of bandwidth (300-360-GHz), with 2 to 4.5mW of local oscillator (LO) power. At room temperature, a minimum DSB mixer noise temperature of 700K and conversion losses of 6.3dB are measured at 330GHz.     

Fabrication and performance of InP-based heterostructure barriervaractors in a 250-GHz waveguide tripler

High-performance InGaAs-InAlAs-AlAs heterostructure barrier varactors (HBV's) have been designed, fabricated, and RF tested in a 250-GHz tripler block. The devices with two barriers stacked on the same epitaxy are planar integrated with coaxial-, coplanar-, and strip-type configurations. They exhibit state-of-the-art capacitance voltage characteristics with a zero-bias capacitance C₃⁰ of 1 fF/μm² and a capacitance ratio of 6:1. Experiments in a waveguide tripler mount show a 9.8-dBm (9.55-mW) output power for 10.7% conversion efficiency at 247.5 GHz. This is the highest output power and efficiency reported from an HBV device at J-band (220-325 GHz)     

Local oscillator chain for 1.55 to 1.75THz with 100-/spl mu/W peak power

We report on the design and performance of a fix-tuned /spl times/2/spl times/3/spl times/3 frequency multiplier chain that covers 1.55-1.75THz. The chain is nominally pumped with 100mW at W-band. At 120K the measured output power is larger than 4/spl mu/W across the band with a peak power of 100/spl mu/W at 1.665THz. A similar chain operated at room temperature produced a peak power of 21/spl mu/W. These power levels now make it possible to deploy multipixel heterodyne imaging arrays in this frequency range.     

A procedure to determine optimal partitions of weighted hypergraphs through a network-flow analogy

Many problems arising in computer science and applications are amenable to finding optimal partitions of weighted hypergraphs or, more simply, of ordinary weighted graphs. As recently noted by some authors, in many cases the construction of optimal or near-optimal partitions is made easier if a family of subsets of nodes of the given hypergraph, calledLS sets, is previously determined. Intiutively, andLS set is a subset of nodes of the hypergraph, which are more strongly connected to each-other than to the nodes in the complementary subset. This paper presents a polynomialbounded procedure to determine all theLS sets in a given weighted hypergraph. The proposed procedure, that is considerably faster than those previously known, is based upon a network-flow analogy and replaces the given hypergraph with a «flow equivalent» tree, into which a collection of subsets of nodes, which includes allLS sets, is easily determined.     

Molecular genetic investigations of autism

Genetic factors are likely to play a major role in the etiology of autism. The genetics of the disorder is however complex, probably involving the action of several genes. In an attempt to identify autism susceptibility loci we are currently undertaking a systematic screening of the whole human genome using multiplex families. We describe the resources and the methods needed to achieve such a task, including extensive collection of family data, semiautomated genotyping technology, and specialized statistical approaches for linkage analysis of complex traits.     

Concurrent detection of additive overflow and arithmetic errors in residue codes

The problems of detecting overflow and single or multiple residue digit errors in Redundant Residue Numeber Systems are considered through an unified approach. It is shown that a single intermodular procedure allows concurrent detection of additive overflow and single residue digit error, even in the case where the error affects a number in overflow. In addition, it is shown that codes of adequate redundancy may allow detection of additive overflow and single bit error, provided that the residue digits are appropriately encoded. The discussion concerns both separate residue codes (i. e., codes being referred to as RRNS, where one or more redundant residues are added) and Product Codes.     

High Efficiency and Wideband 300 GHz Frequency Doubler Based on Six Schottky Diodes

A high efficiency and wideband 300 GHz frequency doubler based on six Schottky diodes is presented in this paper. This balanced doubler features a compact and robust circuit on a 5-μm-thick, 0.36-mm-wide, and 1-mm-long GaAs membrane, fabricated by LERMA-C2N Schottky process. The conversion efficiency is mainly better than 16% across the wide bandwidth of 266–336 GHz (3 dB fractional bandwidth of 24%) when pumping with 20–60 mW input power (P _in) at the room temperature. A peak output power of 14.75 mW at 332 GHz with a 61.18 mW P _in, an excellent peak efficiency of 30.5% at 314 GHz with 43.86 mW P _in and several frequency points with outstanding efficiency of higher than 25% are delivered. This doubler served as the second stage of the 600 GHz frequency multiplier chain is designed, fabricated, and measured. The performance of this 300 GHz doubler is highlighted comparing to the state-of-art terahertz frequency doublers.     

VLSI algorithms and architecture for relational operations

The use of a special purpose VLSI chip for relational operations is proposed The chip is structured like a tree with processors at the nodes, called TOP (Tree of Processors). Each node is capable of storing a data element and of performing elementary operations on elements. A table ofn tuples ofk elements each (e. g., a relation defined as in data base theory) is stored inn subtrees of at leastk nodes each, at the lowest levels of TOP. The upper portion of TOP is used for routing and bookkeeping purposes. A number of elementary operations are defined for the nodes, and high level operations on tables are performed as combinations of the former ones. In particular, some operations for data input/output and update are discussed, and the basic operations of UNION, DIFFERENCE, PROJECTION, PRODUCT, SELECTION, and JOIN, defined in relational algebra, are studied for TOP realization. Even the most complex operations are executed inO (kn) steps, that is the size of data. This result is optimal in our system, where we assume that data are transmitted to TOP's through channels of constan bandwidth. Dedicated to Professor S. Faedo on his 70th birthday This research has been partially supported by Ministero della Pubblica Istruzione of Italy.