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Analytic models based on discrete-time Markov chains (DTMC) are proposed to assess the algorithmic performance of Software Transactional Memory (TM) systems. Base STM variants are compared: optimistic STM with inplace memory updates and write buffering and pessimistic STM. Starting from an absorbing DTMC, closed-form analytic expressions are developed, which are quickly solved iteratively to determine key parameters of the considered STM systems, like the mean number of transaction restarts and the mean transaction length. Since the models reflect complex transactional behavior in terms of read/write locking, data consistency checks and conflict management independent of implementation details, they highlight the algorithmic performance advantages of one system over the other, which – due to their at times small differences – are often blurred by implementation of STM systems and even difficult to discern with statistically significant discrete-event simulations.  相似文献   
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Cognition, Technology & Work - Highly automated driving allows the driver to temporarily delegate the driving task to the autonomous vehicle. The challenge is to define the information that...  相似文献   
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Narayanasamy  S. Pokam  G. Calder  B. 《Micro, IEEE》2006,26(1):100-109
With software's increasing complexity, providing efficient hardware support for software debugging is critical. Hardware support is necessary to observe and capture, with little or no overhead, the exact execution of a program. Providing this ability to developers will allow them to deterministically replay and debug an application to pin-point the root cause of a bug.  相似文献   
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