Evaluation of the validity of the scalar approximation in optical wave propagation using a systems approach and an accurate digital electromagnetic model

The cause and amount of error arising from the use of the scalar approximation in monochromatic optical wave propagation are discussed using a signals and systems formulation. Based on Gauss’s Law, the longitudinal component of an electric field is computed from the transverse components by passing the latter through a two input single output linear shift-invariant system. The system is analytically characterized both in the space and frequency domains. For propagating waves, the large response for the frequencies near the limiting wave number indicates the small angle requirement for the validity of the scalar approximation. Also, a discrete simulator is developed to compute the longitudinal component from the transverse components for monochromatic propagating electric fields. The simulator output helps to evaluate the validity of the scalar approximation when the system output cannot be analytically calculated.     

Impact of NBTI on the temporal performance degradation of digital circuits

Negative bias temperature instability (NBTI) has become one of the major causes for reliability degradation of nanoscale circuits. In this letter, we propose a simple analytical model to predict the delay degradation of a wide class of digital logic gate based on both worst case and activity dependent threshold voltage change under NBTI. We show that by knowing the threshold voltage degradation of a single transistor due to NBTI, one can predict the performance degradation of a circuit with a reasonable degree of accuracy. We find that digital circuits are much less sensitive (approximately 9.2% performance degradation in ten years for 70 nm technology) to NBTI degradation than previously anticipated.     

Equivalence of the LP relaxations of two strong formulations for the capacitated lot-sizing problem with setup times

The multi-item Capacitated Lot-Sizing Problem (CLSP) has been widely studied in the literature due to its relevance to practice, such as its application in constructing a master production schedule. The problem becomes more realistic with the incorporation of setup times since they may use up significant amounts of the available resource capacity. In this paper, we present a proof to show the linear equivalence of the Shortest Path (SP) formulation and the Transportation Problem (TP) formulation for CLSP with setup costs and times. Our proof is based on a linear transformation from TP to SP and vice versa. In our proof, we explicitly consider the case when there is no demand for an item in a period, a case that is frequently observed in the real world and in test problems in the literature. The equivalence result in this paper has an impact on the choice of model formulation and the development of solution procedures.     

Locational analysis for regionalization of Turkish Red Crescent blood services

After a series of earthquakes in 1999, Turkish Red Crescent (TRC) has engaged in a restructuring for all of its activities, including the blood services. Our study on the blood management system had been started as part of this initiative to restructure the blood services and improve both their effectiveness and efficiency. In the current system of TRC, not much consideration has been given to how the locational decisions affect the performance of blood centers, stations and mobile units. In recent years, however, there has been much discussion regarding the regionalization of the blood management system in Turkey. In this study, we develop several mathematical models to solve the location–allocation decision problems in regionalization of blood services. We report our computational results, obtained by using real data, for TRC blood services.     

off-State Degradation in Drain-Extended NMOS Transistors: Interface Damage and Correlation to Dielectric Breakdown

Off-state degradation in drain-extended NMOS transistors is studied. Carefully designed experiments and well-calibrated simulations show that hot carriers, which are generated by impact ionization of surface band-to-band tunneling current, are responsible for interface damage during off-state stress. Classical on-state hot carrier degradation has historically been associated with broken equivSi-H bonds at the interface. In contrast, the off-state degradation in drain-extended devices is shown to be due to broken equivSi-O- bonds. The resultant degradation is universal, which enables a long-term extrapolation of device degradation at operating bias conditions based on short-term stress data. Time evolution of degradation due to broken equivSi-O- bonds and the resultant universal behavior is explained by a bond-dispersion model. Finally, we show that, under off-state stress conditions, the interface damage that is measured by charge-pumping technique is correlated with dielectric breakdown time, as both of them are driven by broken equivSi-O- bonds.     

A malfunction problem and its solution in load-resonant inverters

Load-resonant inverters drive their loads at the load's resonant frequency. The frequency control unit of this type of inverter may be implemented simply by using phase-locked loop-based tuning circuits. However, a problem is detected that may arise randomly in this type of frequency control scheme. When this problem occurs, the inverter's frequency jumps to a value unrelated to the load-resonant frequency and sticks there. Following the analysis of the underlying cause of the problem, it is understood that the problem is caused by the two-valued characteristic of a phase frequency detector. A correction circuit is presented in this paper. When the proposed correction circuit was incorporated into the existing tuning circuitry, the problem was eliminated in the experiments. This shows not only that the correction circuit works well but also that the mechanism of the malfunction was diagnosed accurately.     

Graphene: Piecing it together

Graphene has a multitude of striking properties that make it an exceedingly attractive material for various applications, many of which will emerge over the next decade. However, one of the most promising applications lie in exploiting its peculiar electronic properties which are governed by its electrons obeying a linear dispersion relation. This leads to the observation of half integer quantum hall effect and the absence of localization. The latter is attractive for graphene-based field effect transistors. However, if graphene is to be the material for future electronics, then significant hurdles need to be surmounted, namely, it needs to be mass produced in an economically viable manner and be of high crystalline quality with no or virtually no defects or grains boundaries. Moreover, it will need to be processable with atomic precision. Hence, the future of graphene as a material for electronic based devices will depend heavily on our ability to piece graphene together as a single crystal and define its edges with atomic precision. In this progress report, the properties of graphene that make it so attractive as a material for electronics is introduced to the reader. The focus then centers on current synthesis strategies for graphene and their weaknesses in terms of electronics applications are highlighted.     

Discovering subproblem prioritization rules for shifting bottleneck algorithms

Shifting bottleneck (SB) algorithms have been successful in solving most real-sized scheduling problems. However, it is known that under certain conditions, solution quality degrades because of subproblem interactions. Changing the order in which subproblems are solved greatly affects the solution quality. We demonstrate that for some class of problems it is possible to induce production (IF–THEN) rules that determine the subproblem solution order and lead to good quality solutions, matching the performance of the SB algorithm in most other instances.     

Rapid Modeling and Discovery of Priority Dispatching Rules: An Autonomous Learning Approach

Priority-dispatching rules have been studied for many decades, and they form the backbone of much industrial scheduling practice. Developing new dispatching rules for a given environment, however, is usually a tedious process involving implementing different rules in a simulation model of the facility under study and evaluating the rule through extensive simulation experiments. In this research, an innovative approach is presented, which is capable of automatically discovering effective dispatching rules. This is a significant step beyond current applications of artificial intelligence to production scheduling, which are mainly based on learning to select a given rule from among a number of candidates rather than identifying new and potentially more effective rules. The proposed approach is evaluated in a variety of single machine environments, and discovers rules that are competitive with those in the literature, which are the results of decades of research.     

Theory of interface-trap-induced NBTI degradation for reduced cross section MOSFETs

Negative Bias Temperature Instability (NBTI)-induced degradation for ultra-scaled and future-generation MOSFETs is investigated. Numerical simulations based on Reaction-Diffusion framework are implemented. Geometric dependence of degradation arising from the transistor structure and scaling is incorporated into the model. The simulations are applied to narrow-width planar triple-gate and surround-gate MOSFET geometries to estimate the NBTI reliability under several scaling scenarios. Unless the operating voltages are optimized for specific geometry of transistor cross section, the results imply worsened NBTI reliability for the future-generation devices based on the geometric interpretation of the NBTI degradation. A time-efficient and straightforward analysis is developed to predict the degradation. This compact model confirms the numerical simulations.