A Compact and Low-Power CMOS Circuit for Fully Integrated NEMS Resonators

This brief presents a fully integrated nanoelectromechanical system (NEMS) resonator, operable at frequencies in the megahertz range, together with a compact built-in CMOS interfacing circuitry. The proposed low-power second-generation current conveyor circuit allows detailed read-out of the nanocantilever structure for either extraction of equivalent circuit models or comparative studies at different pressure and dc biasing conditions. In this sense, extensive experimental results are presented for a real mixed electromechanical system integrated through a combination of in-house standard CMOS technology and nanodevice post-processing by nanostencil lithography. The proposed read-out scheme can be easily adapted to operate the nanocantilever in closed loop operation as a stand-alone NEMS oscillator     

Low-Voltage CMOS subthreshold log-domain filtering

This paper presents both a complete set of very low-voltage basic building blocks and a compact design methodology for log filtering in standard or even digital CMOS technologies. The new proposals are based on an alternative translinear loop principle for the MOSFET operating in its subthreshold region. Three different sets of complete basic building blocks are proposed along with all required auxiliary circuitry and a specific matrix design procedure to obtain stable and compact filter implementations. Also, all-MOS filter implementations following these circuit techniques are studied. Simulated and experimental examples are given at 1-V supply voltage for 1.2and 0.35-/spl mu/m CMOS technologies. The resulting circuit techniques are suitable to integrate very low-voltage low-power system-on-a-chip audio applications, such as hearing aids, in standard CMOS technologies.     

Low-Power and Compact CMOS APS Circuits for Hybrid Cryogenic Infrared Fast Imaging

This brief presents a complete set of CMOS basic building blocks for low-cost scanning infrared (IR) cryogenic imagers. Low-power and compact novel circuits are proposed for single-capacitor integration and correlated double sampling, embedded pixel test, pixel charge-multiplexing and video composition and buffering. In order to validate the new basic building blocks, experimental results are reported in standard 0.35-mum CMOS technology for a 50 mum x 100 mum active pixel cell operating at 77 K. Based on the proposed circuits, IR imagers capable of capturing up to 256 x 2560 pixels at 25 fps can be implemented.     

1 V CMOS Subthreshold Log Domain PDM

A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing through the MOSFET operating in weak inversion. A 1 V VLSI PDM circuit for very low-voltage audio applications such as Hearing Aids is presented, showing good agreement between simulated and experimental data.     

A true-1-V 300-/spl mu/W CMOS-subthreshold log-domain hearing-aid-on-chip

This paper presents a true very low-voltage low-power complete analog hearing-aid system-on-chip as a demonstrator of novel analog CMOS circuit techniques based on log companding processing and using MOS transistors operating in subthreshold. Low-voltage circuit implementations are given for all of the required functions including amplification and automatic gain control filtering, generation, and pulse-duration modulation. Based on these blocks, a single 1-V 300-/spl mu/A application specific integrated circuit integrating a complete hearing aid in a standard 1.2-/spl mu/m CMOS technology is presented along with exhaustive experimental data. To the authors' knowledge, the presented system is the only CMOS hearing aid with true internal operation at the battery supply voltage and with one of the lowest current consumptions reported in literature. The resulting low-voltage CMOS circuit techniques may also be applied to the design of A/D converters for digital hearing aids.     

Low-Voltage CMOS Log-Companding Techniques for Audio Applications

This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down to 1 V) low-power (few hundreds of μA) complete SoCs in CMOS technologies. The new design proposal is based on both, the Log Companding theory and the MOSFET operating in subthreshold. Several basic building blocks for audio amplification, AGC and arbitrary filtering are given. The feasibility of the proposed CMOS circuits is illustrated through experimental data for different design case studies in 1.2 and 0.35 μm VLSI technologies.     

Sub-1-V CMOS proportional-to-absolute temperature references

Presents a new all-MOS circuit technique for very-low-voltage proportional-to-absolute temperature (PTAT) references. Optimization of supply scaling below the sum of threshold voltages is based on log companding and implemented by operating the MOSFET in weak inversion. The key design equations for current (/spl mu/A) and voltage (sub-100 mV) references and their standard deviations (around 5%) are derived by analytical analysis. Two sub-1-V sub-5-/spl mu/W integrated PTAT references are presented and exhaustively tested for 1.2- and 0.35-/spl mu/m very large scale integration technologies. Both designs report good agreement between analytical, simulated, and experimental data, exhibiting PSRR(DC)+>60 dB. Hence, the resulting PTAT circuits are suitable for very-low-voltage system-on-a-chip applications in digital CMOS technologies.     

Compact CMOS current conveyor for integrated NEMS resonators

A fully integrated nanoelectromechanical system (NEMS) resonator together with a compact built-in complementary metal-oxide-semiconductor (CMOS) interfacing circuitry is presented. The proposed low-power second generation current conveyor circuit allows measuring the mechanical frequency response of the nanocantilever structure in the megahertz range. Detailed experimental results at different DC biasing conditions and pressure levels are presented for a real mixed electromechanical system integrated through a combination of in-house standard CMOS technology and nanodevice post-processing based on nanostencil lithography. The proposed readout circuit can be adapted to operate the nanocantilever in closed loop as a stand-alone oscillator.     

1 V All-MOS ΣΔ A/D Converters in the Log-domain

This paper presents novel low-voltage all-MOS analog circuit techniques for the synthesis of oversampling A/D converters. The new approach exploits the possibilities of Log-domain processing by using the MOSFET in subthreshold operation. Based on this strategy, a complete set of very low-voltage (down to 1 V) low-power (below 100 W) all-MOS basic building blocks is proposed. The resulting analog circuit techniques allow the integration of A/D converters for low-frequency (below 100 KHz) applications in digital CMOS technologies. Examples are given for a standard 0.35 m VLSI process.     

Full-wafer fabrication by nanostencil lithography of micro/nanomechanical mass sensors monolithically integrated with CMOS

Wafer-scale nanostencil lithography (nSL) is used to define several types of silicon mechanical resonators, whose dimensions range from 20?μm down to 200?nm, monolithically integrated with CMOS circuits. We demonstrate the simultaneous patterning by nSL of ～2000 nanodevices per wafer by post-processing standard CMOS substrates using one single metal evaporation, pattern transfer to silicon and subsequent etch of the sacrificial layer. Resonance frequencies in the MHz range were measured in air and vacuum. As proof-of-concept towards an application as high performance sensors, CMOS integrated nano/micromechanical resonators are successfully implemented as ultra-sensitive areal mass sensors. These devices demonstrate the ability to monitor the deposition of gold layers whose average thickness is smaller than a monolayer. Their areal mass sensitivity is in the range of 10(-11)?g?cm(-2)?Hz(-1), and their thickness resolution corresponds to approximately a thousandth of a monolayer.