n型纳米非对称DG-TFET阈值电压特性研究

n型纳米非对称双栅隧穿场效应晶体管(DG-TFET)速度快、功耗低,在高速低功耗领域具有很好的应用前景,但其阈值电压的表征及其模型与常规MOSFET不同.在深入研究n型纳米非对称DG-TFET的阈值特性基础上,通过求解器件不同区域电场、电势的方法,建立了n型纳米非对称DG-TFET器件阈值电压数值模型,探讨了器件材料物理参数以及漏源电压对阈值电压的影响,通过与Silvaco Atlas的仿真结果比较,验证了模型的正确性.研究表明,n型纳米非对称DG-TFET的阈值电压分别随着栅介质层介电常数的增加、硅层厚度的减薄以及源漏电压的减小而减小,而栅长对其阈值电压的影响有限.该研究对纳米非对称DG-TFET的设计、仿真及制造有一定的参考价值.     

Influence of oxygen content on the crystallinity of MgO layers in magnetic tunnel junctions

With RF sputtering process, Si/Si02/Ta/Ru/Ta/CoFeB/MgO/CoFeB/Ta/Ru structure has been grown on Si （100） substrate. Attempting different targets and adjusting the oxygen dose, the crystallization quality of the MgO layer is studied. The X-ray diffraction measurements demonstrate that crystal structure and crystallization quality of MgO layers are related to the type of target and concentration of oxygen in sputtering process. With the method sputtering Mg in an ambient flow of oxygen, not only the crystallization quality of a normal MgO layer with lattice constant of 0.421 nm is improved, but also a new MgO crystal with lattice constant of 0.812 nm is formed and the perpendicular magnetic anisotropy of CoFeB is enhanced. Also it is found that crystallization quality for both the normal MgO and new MgO is more improved with MgO target and same oxygen dose, which means that this new method is helpful to form a new structure of MgO annealed at 400 ℃ in vacuum. with lattice constant of 0.812 nm. All of the samples were     

一种基于绝缘体上Ge的碰撞电离晶体管北大核心

碰撞电离晶体管(IMOS)在高速、低功耗领域具有很好的应用前景。以优化传统IMOS的工作电压为目的,介绍了一种基于绝缘体上Ge的碰撞电离晶体管(GOI IMOS),利用Synopsys公司的ISE_TCAD对GOI IMOS的性能进行仿真分析与验证。结果表明,GOI IMOS相比于传统的绝缘体上Si的碰撞电离晶体管(SOI IMOS)可在更低的源漏偏压下工作,同时该器件能够实现大的开态电流与陡峭的亚阈值摆幅;另外,GOI IMOS的源漏偏压和栅长均对该器件阈值电压有较大的影响,p型GOI IMOS阈值电压的绝对值随着源漏电压和栅长的增大而减小。以上工作可为IMOS的设计、仿真、制备提供一定的理论指导。     

Physically based analytical model for plateau in gate C-V characteristics of strained silicon pMOSFET

A physically based analytical model was developed to predict the performance of the plateau observed in the gate C-V characteristics of strained-Si/SiGe pMOSFET.Experimental results were used to validate this model.The extracted parameters from our model were tox=20 nm,ND=1×1016 cm-3,tssi=13.2 nm,consistent with the experimental values.The results show that the simulation results agree with experimental data well.It is found that the plateau can be strongly affected by doping concentration,strained-Si layer thickness and mass fraction of Ge in the SiGe layer.The model has been implemented in the software for strained silicon MOSFET parameter extraction,and has great value in the design of the strained-Si/SiGe devices.     

Effect of substrate doping on threshold voltages of buried channel pMOSFET based on strained-SiGe technology

The effect of substrate doping on the threshold voltages of buried channel pMOSFET based on strained-SiGe technology was studied. By physically deriving the models of the threshold voltages, it is found that the layer which inversely occurs first is substrate doping dependent, giving explanation for the variation of plateau observed in theC-V characteristics of this device, as the doping concentration increases. The threshold voltages obtained from the proposed model are-1.2805 V for buried channel and-2.9358 V for surface channel at a lightly doping case, and-3.41 V for surface channel at a heavily doping case, which agrees well with the experimental results. Also, the variations of the threshold voltages with several device parameters are discussed, which provides valuable reference to the designers of strained-SiGe devices.