A Low-Power Wide-Dynamic-Range Analog VLSI Cochlea

Low-power wide-dynamic-range systems are extremely hard to build. The biological cochlea is one of the most awesome examples of such a system: It can sense sounds over 12 orders of magnitude in intensity, with an estimated power dissipation of only a few tens of microwatts. In this paper, we describe an analog electronic cochlea that processes sounds over 6 orders of magnitude in intensity, and that dissipates 0.5 mW. This 117-stage, 100 Hz to 10 KHz cochlea has the widest dynamic range of any artificial cochlea built to date. The wide dynamic range is attained through the use of a wide-linear-range transconductance amplifier, of a low-noise filter topology, of dynamic gain control (AGC) at each cochlear stage, and of an architecture that we refer to as overlapping cochlear cascades. The operation of the cochlea is made robust through the use of automatic offset-compensation circuitry. A BiCMOS circuit approach helps us to attain nearly scale-invariant behavior and good matching at all frequencies. The synthesis and analysis of our artificial cochlea yields insight into why the human cochlea uses an active traveling-wave mechanism to sense sounds, instead of using bandpass filters. The low power, wide dynamic range, and biological realism make our cochlea well suited as a front end for cochlear implants.     

Parallel feedforward class-AB control circuits for low-voltage bipolar rail-to-rail output stages of operational amplifiers

A new family of class-AB control circuits for bipolar rail-to-rail output stages of operational amplifiers is presented. Step by step, we report the development of five simple class-AB control circuits showing the advantages of using parallel feedforward. The circuits have been designed in such a way that temperature, supply voltage and process parameters have little influence. To test the output stages, one of them has been implemented in a very simple two-stage operational amplifier on a semi-custom chip. Measurements show a bandwidth of 2.5 MHz, a gain of 40 dB, a quiescent current of 23µA and a maximum output current of 250µA. Simulation results of three other simple operational amplifiers with the new class-AB control circuits are shown, which have a higher gain and maximum output current.     

Low-Power Adaptive Biased Integrated Amplifiers

In this paper the author will present the working principle and the applications of a novel adaptive biasing topology, designed to decrease the stand-by power dissipation without affecting the transient performance of low-power amplifiers. The proposed circuit, whose principle and circuit topology can be implemented both in CMOS and in bipolar standard technologies, gives a biasing current whose value depends on the applied input differential voltage and can be set according to the requested transient performance constraints. The adaptive architecture can be utilized in the design of high-efficient low-power operational amplifiers, for the biasing of both the input stage (where the input source current is dynamically increased) and the output stage (where the output current can be controlled and limited). These amplifiers show a very good behaviour, evaluated in terms of two efficiency factors, if compared with those of other adaptive solutions and class-AB topologies, proposed in the literature. Simulation results and also measurements on a chip prototype, fabricated in a standard CMOS technology, are finally presented.     

CADRE: An Asynchronous Embedded DSP for Mobile Phone Applications

Asynchronous design techniques have a number of compelling features that make them suited for complex system on chip designs. However, it is necessary to develop practical and efficient design techniques to overcome the present shortage of commercial design tools. This paper describes the development of CADRE (Configurable Asynchronous DSP for Reduced Energy), a 750K transistor, high performance, low-power digital signal processor IP block intended for digital mobile phone chipsets. A short time period was available for the project, and so a methodology was developed that allowed high-level simulation of the design at the earliest possible stage within the conventional schematic entry environment and simulation tools used for later circuit-level performance and power consumption assessment. Initial modeling was based on C behavioral models of the various data and control components, with the many asynchronous control circuits required automatically generated from their specifications. This has enabled design options to be explored and unusual features of the design, such as the Register Bank which is designed to exploit data access patterns, are presented along with the power and performance results of the processor as a whole.     

基于ZigBee的温室监测系统的低功耗设计

针对传统温室大棚有线监测系统存在施工复杂、线路多和维护难等缺陷,提出了一种基于ZigBee无线传感网络技术的低功耗温室监测系统的设计方案;通过对系统各部分的能耗进行分析,结合实际情况对传感器节点采用低功耗设计策略;硬件设计上采用低功耗射频芯片和智能开关芯片,软件编写上采用事件驱动方法延长节点休眠时间;该系统能够准确采集温室内光照度、空气温湿度、土壤水分和二氧化碳浓度等环境信息,并具有低功耗、低成本和易扩展等特点;测试结果验证了该方案的可行性。     

Event-driven,pattern-based methodology for cost-effective development of standardized personal health devices

Experiences applying standards in personal health devices (PHDs) show an inherent trade-off between interoperability and costs (in terms of processing load and development time). Therefore, reducing hardware and software costs as well as time-to-market is crucial for standards adoption. The ISO/IEEE11073 PHD family of standards (also referred to as X73PHD) provides interoperable communication between PHDs and aggregators. Nevertheless, the responsibility of achieving inexpensive implementations of X73PHD in limited resource microcontrollers falls directly on the developer. Hence, the authors previously presented a methodology based on patterns to implement X73-compliant PHDs into devices with low-voltage low-power constraints. That version was based on multitasking, which required additional features and resources. This paper therefore presents an event-driven evolution of the patterns-based methodology for cost-effective development of standardized PHDs. The results of comparing between the two versions showed that the mean values of decrease in memory consumption and cycles of latency are 11.59% and 45.95%, respectively. In addition, several enhancements in terms of cost-effectiveness and development time can be derived from the new version of the methodology. Therefore, the new approach could help in producing cost-effective X73-compliant PHDs, which in turn could foster the adoption of standards.     

Low-Power Operational Amplifier for Real-Time Signal Processing System of Micro Air Vehicle

A low-power complementary metal oxide semiconductor(CMOS) operational amplifier (op-amp) for real-time signal processing of micro air vehicle (MAV) is designed in this paper. Traditional folded cascode architecture with positive channel metal oxide semiconductor(PMOS) differential input transistors and sub-threshold technology are applied under the low supply voltage. Simulation results show that this amplifier has significantly low power, while maintaining almost the same gain, bandwidth and other key performances. The power required is only 0.12mW, which is applicable to low-power and low-voltage real-time signal acquisition and processing system.     

The characteristics of a low-power-consumption plasma jet and ceramic coatings

The effects of the composition of plasma gases (Ar-N₂, Ar-H₂), arc current, and voltage on the temperature and velocity of a low-power (5 kW) plasma torch in the arc field free region has been investigated using an enthalpy probe. Coatings of Al₂O₃-13TiO₂ were deposited under different conditions. The results show that in the Ar-N₂ plasma, the enthalpy, temperature, and velocity change little with arc current and voltage when regulating the nitrogen proportion in the plasma gas. The hardness of the resulting coatings is 800 to 900 kg/mm² HV.300. For Ar-H₂ plasma, however, increases in the H₂ content in the mixture of the gases remarkably enhanced the velocity and heat transfer ability of the plasma jet, with the result that the coatings showed high hardness up to 1200 HV.     

基于MSP430F149的冰川参数采集系统

介绍了一种新型低功耗、高稳定性的冰川参数采集系统.系统以低功耗单片机MSP430F149为主控制器,集成高精度低功耗温湿度传感器SHT21、超声波传感器US-100、GPS,高精度实时时钟芯片PCF8563、EEPROM、SD卡、Zig Bee无线传感器网络(WSNs)和电源管理等模块,采用定时低功耗工作模式,实现了冰川温度与湿度、冰川地理坐标、雪高度等参数的自动测量和存储,并将所测的数据通过ZigBee WSNs传输到数据处理中心.     

一种用于列检场的低功耗有源RFID标签设计

在列车检验维修作业场中进行列检人员定位时,需要布置大量的有源参考标签,因此设计一个低功耗的定位系统符合实际应用的需要.硬件微控制器模块采用TI公司的MSP430F149单片机,标签RF模块采用nRF24 L01,阅读器通过USB线将定位数据传输至上位机.利用中断延时程序,使标签在休眠和工作状态之间合理转换,从而进一步降低系统的功耗.实验测试表明,标签处于收发模式时功耗为0.06 W,休眠模式时功耗约7.25 μW,有效延长了电池的使用寿命,符合低功耗标准.