可配置、可扩展的处理器Xtensa

Xtensa是一种专用于嵌入式系统的新型处理器体系结构和支持环境，它是可配置和可扩展的处理器，可以帮助内嵌式系统的设计者用更少的时间创建更好、更加集成的产品。文章分析了Xtensa的主要特点，并就其指令集体系结构、指令扩展等方面进行了详细阐述，最后给出它的使用实例。     

基于可配置处理器的AES算法设计

研究高级加密标准AES算法的加密解密流程,分析算法的执行热点,并提出一种基于可配置处理器的优化方法,设计适合于AES算法的处理器配置,实现多条AES算法专用指令,并采用硬件查找表技术提高新处理器算法对热点的执行能力。实验结果证明,此方法大大减少了多个热点的执行周期数,提高了AES算法的执行效率。     

可配置、可扩展的处理器Xtensa

Xtensa是一种专用于嵌入式系统的新型处理器体系结构和支持环境,它是可配置和可扩展的处理器,可以帮助内嵌式系统的设计者用更少的时间创建更好、更加集成的产品.文章分析了Xtensa的主要特点,并就其指令集体系结构、指令扩展等方面进行了详细阐述,最后给出它的使用实例.     

基于Xtensa的ASIP开发流程研究

介绍了ASIP处理器的功能特性、结构特点和开发流程以及Tensilica Xtensa可配置、可扩展处理器及其开发工具集。详细阐述了利用Xplorer、XPRES、XEnergy等工具开发面向低功耗图像压缩应用的ASIP的实际流程，通过实例展示了Xtensa工具集在算法仿真分析、体系结构、指令集和软硬件自动生成方面的强大优势。     

Using Tensilica Xtensa configures a dual-core processor based-on SoC

In this paper, we proposed a multi-core processor, which is based on system-on-chip （SoC） architecture and established by configurable processor via Tensilica Xtensa LX2. The purpose of this paper is to describe the heterogeneous configurable dual-core processor, in which one core is responsible host operating control for the system and the other is as an extension of digital signal processing applications. However, the designed core not only owns its local memory, but also shares a common data-memory. We also put virtual memory in this proposed processors, this addition memory allows processor easily to handle a more complex application programs while two cores are able to share a unified data-memory in different kinds tasks, simultaneously. The advantages of the proposed structure can avoid and reduce many hard-wired of memory and interface respectively. For bus managing, a single bus as interface is proved. In this bus system an arbitration mechanism is added to handle the communication between cores and to distribute the priority of access request, in order to ensure that those cores operation under synchronously.