基于三维胞元空间的MA双向并行路由算法

针对传统移动代理(MA)在监测无线传感器网络(WSNs)的感兴趣信息时产生的延迟较大和能耗较多问题,提出了基于三维胞元空间的MA双向并行(3D-BPMA)路由算法.3D-BPMA将MA与传统的客户/服务器(c/S)模式相结合,在胞元内利用C/S模式搜集信息,在单层胞元系统和路由器与路由器之间采用MA双向并行的策略进行传输.仿真结果表明:3D-BPMA与LCF,DSG-MIP算法相比减少了平均响应时间和网络平均能耗,提高了MA发送率.     

Mixed coordination mechanisms for scheduling games on hierarchical machines

In this paper, we study scheduling games under mixed coordination mechanisms on hierarchical machines. The two scheduling policies involved are ‐ and ‐, where ‐ (resp., ‐) policy sequences jobs in nondecreasing order of their hierarchies, and jobs of the same hierarchy in nonincreasing (resp., nondecreasing) order of their processing times. We first show the existence of a Nash equilibrium. Then we present the price of anarchy and the price of stability for the games with social costs of minimizing the makespan and maximizing the minimum machine load. All the bounds given in this paper are tight.     

离心泵并联运行工况点的数值求解

建立了求解多台不同型号离心泵并联运行工况点的数学模型,给出了用数值计算中的“二分法”求解该模型的方法,并附有用Exce l计算的实例。     

串行及并行A/D转换器在高速数据采集中的采样差别性分析

串行和并行接口模式是A/D转换器诸多分类中的一种,但却是应用中器件选择的一个重要指标.在同样的转换分辨率及转换速度的前提下,不同的接口方式不但影响了电路结构,更重要的是将在高速数据采集的过程中对采样周期产生较大影响.本文通过12位串行ADC ADS7822和并行ADC ADS774与AT89C51的接口电路,给出二者采样时间的差异性.     

可并联逆变器中的同步控制技术及其实现

论述了可并联逆变器中的同步控制技术及其实现方法。在分析了同步的重要性之后，提出了抢占与并发相结合的同步控制策略及其实现方法，实践证明该方法具有很高的控制精度。     

A Neural Network Approach for Signal Detection in Digital Communications

In this paper, we propose a new approach for signal detection in wireless digital communications based on the neural network with transient chaos and time-varying gain (NNTCTG), and give a concrete model of the signal detector after appropriate transformations and mappings. It is well known that the problem of the maximum likelihood signal detection can be described as a complex optimization problem that has so many local optima that conventional Hopfield-type neural networks fail to solve. By refraining from the serious local optima problem of Hopfield-type neural networks, the NNTCTG makes use of the time-varying parameters of the recurrent neural network to control the evolving behavior of the network so that the network undergoes the transition from chaotic behavior to gradient convergence. It has richer and more flexible dynamics rather than conventional neural networks only with point attractors, so that it can be expected to have much ability to search for globally optimal or near-optimal solutions. After going through a transiently inverse-bifurcation process, the NNTCTG can approach the global optimum or the neighborhood of global optimum of our problem. Simulation experiments have been performed to show the effectiveness and validation of the proposed neural network based method for the signal detection in digital communications.     

An Effective Software Pipelining Algorithm for Clustered Embedded VLIW Processors

This paper proposes a software pipelining framework, CALiBeR (ClusterAware Load Balancing Retiming Algorithm), suitable for compilers targetingclustered embedded VLIW processors. CALiBeR can be used by embedded systemdesigners to explore different code optimization alternatives, that is, high-qualitycustomized retiming solutions for desired throughput and program memory sizerequirements, while minimizing register pressure. An extensive set of experimentalresults is presented, demonstrating that our algorithm compares favorablywith one of the best state-of-the-art algorithms, achieving up to 50% improvementin performance and up to 47% improvement in register requirements. In orderto empirically assess the effectiveness of clustering for high ILP applications,additional experiments are presented contrasting the performance achievedby software pipelined kernels executing on clustered and on centralized machines.     

Parallel path consistency

Filtering algorithms are well accepted as a means of speeding up the solution of the consistent labeling problem (CLP). Despite the fact that path consistency does a better job of filtering than arc consistency, AC is still the preferred technique because it has a much lower time complexity. We are implementing parallel path consistency algorithms on multiprocessors and comparing their performance to the best sequential and parallel arc consistency algorithms.^(1,2) (See also work by Kerethoet al. ⁽³⁾ and Kasif⁽⁴⁾) Preliminary work has shown linear performance increases for parallelized path consistency and also shown that in many cases performance is significantly better than the theoretical worst case. These two results lead us to believe that parallel path consistency may be a superior filtering technique. Finally, we have implemented path consistency as an outer product computation and have obtained good results (e.g., linear speedup on a 64K-node Connection Machine 2).     

用于实时数据传输的滑动帧方法及其实现

根据某雷达系统对测量信号的快速传输要求,提出采用滑动帧的处理方法并在FPGA中实现,克服了传统帧处理难以满足快速传输要求的不足。阐述了滑动帧结构的构造思想,详述了滑动帧结构的特点及具体功能模块的实现。根据实际应用需求构造了滑动帧结构处理器,试验和应用结果表明设计可行有效,能充分满足实时数据传输的要求。