新结构MOSFET

和传统平面结构MOSFET相比，新结构MOSFET具有更好的性能(如改善的沟道效应(SCE)，理想的漏诱生势垒降低效应(DIBL)和亚阈值特性)和更大的驱动电流等。文章主要介绍了五种典型的新结构MOSFET，包括平面双栅MOSFET、FinFET、三栅MOSFET、环形栅MOSFET和竖直结构MOSFET。随着MOSFET向亚50nm等比例缩小，这些新结构器件将大有前途。     

LDD方法在提高电路工作电压中的应用研究

研究了利用轻掺杂漏结构来制作高电源电压器件的工艺方法。分析了ＬＤＤ结构参数对器件击穿特性的影响，并结合实验结果对Ｎ＾－区的注入剂量，长度及引入的串联电阻进行了优化设计。     

NMOS器件两次沟道注入杂质分布和阈电压计算

分别考虑了深浅两次沟道区注入杂质在氧化扩散过程中对表面浓度的贡献。对两次注入杂质的扩散分别提取了扩散系数的氧化增强系数、氧化衰减系数和有效杂地系数，给出了表面浓度与工艺参数之间的模拟关系式，以峰值浓度为强反型条件计算了开启电压，文章还给出了开启电压、氧化条件、不同注入组合之间的关系式。     

新型高k栅介质材料研究进展

随着半导体技术的不断发展，MOSFET（metal-oxide-semiconductor field effect transistor）的特征尺寸不断缩小，栅介质等效氧化物厚度已小至nm数量级。这时电子的直接隧穿效应将非常显著，将严重影响器件的稳定性和可靠性。因此需要寻找新型高k介质材料，能够在保持和增大栅极电容的同时，使介质层仍保持足够的物理厚度来限制隧穿效应的影响。本文综述了研究高k栅介质材料的意义；MOS栅介质的要求；主要新型高k栅介质材料的最新研究动态；展望了高k介质材料今后发展的主要趋势和需要解决的问题。     

利用新型场效应管(QFET)的正向变换器

介绍了单端正向变换器基本电路，重点叙述带三路调节DC电压的100KHZ180W离线电源。它采用具有低导电阻RDS和低栅极电荷Qg的新型场效应管（QFET）作为变换电路的主开关器件，降低了电源开关损耗并提高了效率3%-5%。     

Application of piece‐wise linear weight functions for 2D 8‐node quadrilateral element in contact problems

The present study is a continuation of our previous work with the aim to reduce problems caused by standard higher order elements in contact problems. The difficulties can be attributed to the inherent property of the Galerkin method which gives uneven distributions of nodal forces resulting in oscillating contact pressures. The proposed remedy is use of piece‐wise linear weight functions. The methods to establish stiffness and/or mass matrix for 8‐node quadrilateral element in 2D are presented, i.e. the condensing and direct procedures. The energy and nodal displacement error norms are also checked to establish the convergence ratio. Interpretation of calculated contact pressures is discussed. Two new 2D 8‐node quadrilateral elements, QUAD8C and QUAD8D, are derived and tested in many examples, which show their good performance in contact problems. Copyright © 2004 John Wiley & Sons, Ltd.     

一种工艺过程流体强化装置

介绍了一种提高工艺过程效率的强化装置,即通过在过程设备上设置振荡装置,使过程设备内的流体产生扰动,破坏流动边界层,使流体获得附加雷诺数提高流动的湍流程度,达到强化过程设备内工艺过程的目的。该强化装置的调节弹性大,适应范围宽。调节强化装置中转子的转速、几何尺寸、空间位置和方向等参数或更换挡板形式,就能适应各种工艺过程条件。该装置可用于传热、传质及化学反应等多种过程,以提高过程效率,节约能源和资金,减小设备体积,并可将机械搅拌类的间歇过程转化为连续过程。     

Temperature Oscillation Calorimetry: Robustness analysis of different algorithms for the evaluation of the heat transfer coefficient

Applicability of different temperature oscillation calorimetry algorithms, previously proposed in the literature, for the evaluation of the heat transfer coefficient during the course of the reaction, is analysed by referring to the experimental data from a methyl methacrylate polymerisation reactor.Results are coincident in the nominal case (no errors on data), while differences appear in the elaboration of real data. The effect of uncertainty in the experimental data has been simulated in terms of error on the amplitude and on the phase of reactor and jacket temperature profiles.This approach allows to indicate algorithms having the best robustness properties and to give an explanation of phase errors in terms of a lumped parameter which accounts for different phenomena, not included in the basic hypotheses of the method. Based on this observation, a procedure to eliminate this source of errors from experimental data is proposed for the more general algorithm presented to handle oscillating temperature profiles generated by different techniques.     

MOSFET亚阈特性分析与低温按比例缩小理论的研究

器件尺寸按比例缩小是实现超大规模集成电路的有效途径，但寄生和二级效应却将器件限在一定的水平，本文在对比分析常温与低温下小尺寸器件效应的基础上，重点研究了ＭＯＳ器件亚阈特性对器件性能及按比例缩小的影响，并根据低温工作的特点，提出了ＭＯＳ器件一种低温按比例缩小规则，该原则对低温器的优化设计，从而更大程度在提高电路与系统性能具有重要的指导意义。     

Silicon power MOSFET at low temperatures: A two-dimensional computer simulation study

Understanding how the structure of the unit-cell affects the cryogenic performance of a Si power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is an important step toward optimizing of the device for cryogenic operations. In this paper, numerical simulations of the Si power Double Diffused MOSFET’ (DMOS) are performed at room temperature and cryogenic temperatures. Physically based models for temperature dependent silicon properties are employed in the simulations. The performances of power DMOS’ with various unit-cell structures are compared at both room temperature and low temperatures. The effect of the cell structure on the on-resistance and breakdown voltage of the device are analyzed. The simulation results suggest that the device optimized for room temperature operation can be further optimized at cryogenic temperatures.