45钢的脉冲爆炸-等离子体表面改性

采用脉冲爆炸-等离子体(PDP)技术对45钢进行表面改性处理,用OM、SEM、XRD分析了PDP处理前后试样的截面形貌和相结构变化,利用显微维氏硬度计、磨损测试和电化学方法研究了PDP处理前后显微硬度、耐磨性能和耐腐蚀性能。结果表明:由于PDP过程中含有空气成分,并在处理时快速加热与冷却试样,使改性层有残余奥氏体出现,并生成新相Fe3N,形成了一层厚约52.10μm的含有柱状晶与细晶区双层结构的改性层。PDP处理使45钢表层在一定深度范围内显微硬度提高约2.9倍,耐磨损性能也得到了有效的改善,磨损质量损失仅为基体的1/3,磨痕宽度也明显减小。     

Novel gate-overlap tunnel FET based innovative ultra-low-power ternary flash ADC

This paper presents a highly efficient ternary flash ADC, designed using the innovative gate-overlap tunnel FET (GOTFET) at the 45 nm technology node. The proposed GOTFETs have on-state currents I_on more than double, while the off-state currents I_off remaining at least an order of magnitude lower than the corresponding values of the standard 45 nm CMOS technology with the same width. Replacing MOSFETs with the proposed GOTFETs significantly reduces the static power consumption and improves performance. However, the higher I_on increases the dynamic power as well. To minimize the dynamic power, we propose a novel complementary GOTFET (CGOT) based comparator design. In addition to the inherent advantages of the GOTFET technology, the proposed design further reduces the dynamic power, such that the final power delay product (PDP) is merely 6.3% of the PDP in conventional CMOS comparator design. In addition to the novelty related to the innovative GOTFET devices, there are at least two-fold circuit-level novelty reported in this work. Firstly, we propose a novel CGOT based comparator circuit design, which, in addition to the advantages of GOTFET, further reduces the dynamic power such that the PDP is less than 1/3rd of the original PDP of the conventional comparator designed with GOTFETs. Secondly, the proposed CGOT based ADC requires only 48 transistors to encode the comparator outputs into the 2-bit ternary output, which is 30% lower than the 70 transistors necessary for the 2-bit CMOS based ternary flash ADC designs reported earlier in the literature. We propose an efficient 2-bit ternary flash ADC with a resolution of 50 mV and input quantized to 9 levels. Subsequently, we benchmark the performance of the proposed CGOT ternary flash ADC with the same ADC circuit implemented using the standard 45 nm CMOS technology library, all corresponding devices having the same width. We demonstrate that in addition to the superior performance than the corresponding CMOS ADC, the proposed CGOT ADC design consumes significantly lower power. The overall PDP of the proposed CGOT ADC is merely 6.3% of the PDP in corresponding CMOS design.     

等离子显示器滤光保护膜的研究进展

本文介绍了等离子显示器的优缺点,并对其显示过程中所需的滤光保护膜进行了分析。分别对电磁屏蔽、近红外吸收、橘黄调色以及防反射等功能膜的研究进展进行了综述。重点阐述了各功能薄膜所用材料与薄膜制备方法在国内外的研究与应用。     

一种低抖动噪声的PDP动态假轮廓改善方法

为降低等离子体显示器(PDP)动态假轮廓(DFC)改善中的抖动噪声,提出了一种抖动区域宽度自适应变化并融合孤立像素点分离的随机抖动改善DFC方法.首先分析DFC干扰条纹的特性,得到符合视觉特性的DFC评测方法;然后根据DFC的严重程度计箅相应的抖动区域宽度,采用融合孤立像素点分离的随机抖动方法实现未被选取的灰度级.仿真...     

3G PDP激活成功率优化

文章主要基于中国联通深圳分公司的3G PDP激活成功率优化经验,详细介绍了由无线链路建立失败导致PDP激活成功率低的典型优化案例;其中分别从无线业务建立流程、上行干扰、基站与传输故障、IUB传输配置优化等角度出发,制定并实施了系列优化方案,最终显著提升了3G PDP激活成功率。     

用于AC-PDP保护层的六硼化镧薄膜的制备与性能研究

采用丝网印刷法在PDP的传统Mg O保护层上制备了六硼化镧薄膜。改变工艺参数,测试了La B6/Mg O薄膜的表面形貌和光学性能,并对透明的La B6/Mg O薄膜在Xe/Ne混合气体中的放电性能进行了测试。实验结果表明,采用400目丝网和球磨后的La B6粉末有利于提高La B6/Mg O薄膜的透过率,相比于原有的Mg O衬底,透过率达到90%以上。放电测试结果表明,印刷了La B6薄膜的Mg O+La B6样品的放电性能优于传统的Mg O保护层,其中着火电压降低了7%左右,放电延迟降低了9%左右。     

Effects of exo-electron emission from MgO thin film on statistical delay of glow discharge of ac-PDP

Relationship between exo-electron emission currents and statistical delay of glow discharges of ac-PDP was investigated by measuring exo-electron currents. The currents were measured as a function of time and doping elements. The measured results indicated that the exo-electron currents decrease exponentially with time, while the statistical delay increases with time. The results demonstrate that the statistical discharge delay is inversely proportional to the currents of exo-electron emission from MgO film in a time interval of 1 to 10 ms.     

Parameters influencing exo‐electron emission currents from MgO film of ACPDPs

Abstract— A theoretical model of exo‐electron emission kinetics was developed by considering back‐diffusion and the gas‐amplification phenomena. Using the model, the effects of temperature, trapped electron concentration, trap energy level, and trap concentration on the exo‐electron currents were predicted and compared with experimental results. The theoretically predicted values agreed reasonably well with the trends of the measured results.     

GGSN协议的一个流程问题分析及改进

在网关GPRS(通用无线分组业务)支持节点(GGSN)项目与服务GPRS支持节点(SGSN)项的集成测试中发现了GGSN相关协议的一处流程交互的定义的缺陷,该缺陷导致在异常的流程处理中大量垃圾上下文的生成,并使得GGSN与SGSN两侧信息产生较大的不一致,这些不一致的信息将在较长时间影响系统的后续运行并产生运行错误.本文分析了此流程缺陷产生的原因并对相应流程提出一种改进的方法.实验环境下的测试结果表明,对协议做这样的改进可以完全解决这一问题并保证工程实现的高效性.     

Space and time evolution of the plasma in a PDP cell: Comparisons between simulations and experiments

We have used a macroscopic discharge cell to study the space and time evolution of the plasma in geometry similar to real matrix and coplanar PDP cells with a scaling factor of around 100 (dimensions 100 times larger, pressure 100 times smaller, i.e., 1‐cm gap length, 5‐torr pressure). Discharges in pure neon and in a xenon‐neon mixture with 10% xenon have been investigated. The measurements have been compared with results from a two‐dimensional fluid model of the discharge.