A fully integrated direct-conversion digital satellite tuner in 0.18μm CMOS

A fully integrated direct-conversion digital satellite tuner for DVB-S/S2 and ABS-S applications is presented.A broadband noise-canceling Balun-LNA and passive quadrature mixers provided a high-linearity low noise RF front-end,while the synthesizer integrated the loop filter to reduce the solution cost and system debug time.Fabricated in 0.18μm CMOS,the chip achieves a less than 7.6 dB noise figure over a 900-2150 MHz L-band, while the measured sensitivity for 4.42 MS/s QPSK-3/4 mode is -91 dBm at the PCB connector.The fully integrated integer-N synthesizer operating from 2150 to 4350 MHz achieves less than 1℃integrated phase error. The chip consumes about 145 mA at a 3.3 V supply with internal integrated LDOs.     

一种0.18μm CMOS 全集成直接变频数字卫星调谐器

本文设计了一种满足DVB-S/S2和ABS-S标准的全集成直接变频数字卫星调谐芯片。具有单端转差分功能的低噪声放大器及无源混频器实现了高线性度与低噪声的射频前端,同时频率综合器集成了环路滤波器有效地提高了集成度及减小系统成本与板级调试时间。0.18μm CMOS工艺制程下,PCB板级测试结果表明芯片在900至2150 MHz 的L波段上噪声系数小于7.6 dB,4.42 M符号率 QPSK-3/4 模式下的灵敏度达到-91dBm。全集成整数频率综合器在2150到4350 MHz的工作频带内相位误差小于1°。芯片集成LDO,外部电源电压3.3V,工作电流145mA。     

A dual-band reconfigurable direct-conversion receiver RF front-end

6 dBm at 2.2 GHz, and a gain of 18.8 dB and IIP3 of 7.3 dBm at 4.5 GHz. The whole front-end consumes 12 mA current at 1.2 V voltage supply for the LNA and 2.1 mA current at 1.8 V for the mixer, with a die area of 1.2 × 1 mm2.     

802.11b收发系统中的全集成低功耗发送机设计

基于SMIC 0.18μm CMOS工艺,设计了一个应用于IEEE 802.11b收发系统的全集成低功耗发送机.直接转换发送机包括两个Chebyshev Ⅰ型低通滤波器,两个可编程增益放大器(PGA),一个单边带混频器和一个功率预放大器.发送机以3dB为步长提供32dB增益,其最大输出功耗为-3.4dBm,EVM为6.8%.工作在1.8V电源电压,发送机的功耗仅57.6mW.发送机芯片面积为1.6mm×1.6mm.     

802.11b收发系统中的全集成低功耗发送机设计

基于SMIC 0.18μm CMOS工艺，设计了一个应用于IEEE 802.11b收发系统的全集成低功耗发送机. 直接转换发送机包括两个Chebyshev I型低通滤波器，两个可编程增益放大器(PGA),一个单边带混频器和一个功率预放大器. 发送机以3dB为步长提供32dB增益，其最大输出功耗为-3.4dBm, EVM为6.8%. 工作在1.8V电源电压，发送机的功耗仅57.6mW. 发送机芯片面积为1.6mm×1.6mm.     

弹载雷达侦察干扰设备设计

论述了弹载雷达侦察干扰设备的天线设计、接收机设计和信号处理硬件设计,并从实际需求出发,重点讨论了信号处理算法中的信号检测技术、瞬时测频技术、雷达信号脉内调制识别技术和干扰信号产生技术.仿真结果表明所采用的信号处理算法可行,对于弹载平台雷达侦察干扰设备的设计具有指导意义.     

应用于无线传感器网络的射频发射机电路

设计了符合工业无线传感器网络WIA-PA标准的发射机电路.采用中频转换电路控制模拟中频信号的偏置及幅度以满足混频器的输入范围.采用正交双平衡混频器结构进行上变频,通过在固定电容上串联可调电容,拓宽了混频器的选频范围.后级接可编程功率预放大器,产生差分的功率输出信号,以满足不同传输距离的要求.发射机电路在0.13 μm CMOS工艺下进行流片.通过与WIA-PA基带芯片联合调试,测试结果表明,设计的直接上变频发射机芯片的误差矢量幅度(EVM)小于13.5％,镜像抑制达到34 dBc,很好地满足了无线传感器网络节点的应用需求.     

直接变频发射机中的载波泄露抑制方案

针对直接变频发射机中的载波泄漏问题,提出一种基于数字基带的矫正方案.该方案通过在射频芯片上引入一条矫正通路,将载波泄漏失配量检测出来发送给数字基带,数字基带完成矫正工作.与传统的矫正方案相比,该方案减小了芯片面积和功耗,降低了设计难度.系统仿真结果表明基于数字基带的矫正方案的矫正误差小于1.6%.     

Bandwidth enhancement of the monopole antenna by using a parasitic normal-mode helix

An innovative monopole antenna coupled with a parasitic normal-mode helix has been designed and studied both experimentally and theoretically. The effects of various dimensions of the monopole and the parasitic helix were investigated extensively. This simple combination can significantly enhance the antenna bandwidth over that of the conventional monopole antenna. It is found that, with suitably chosen antenna dimensions, the VSWR bandwidth (VSWR ≤ 2) of the antenna can be increased to 36%, almost double that of the monopole antenna alone. The far-field pattern of the combined antenna is basically the same as that of the monopole antenna. This antenna is designed to operate at 1.8GHz. The substantially enhanced bandwidth of this simple and small antenna is a useful feature for future mobile communications.