Optimization of Selective Epitaxial Growth of Silicon in LPCVD

Selective epitaxial growth (SEG) of silicon has attracted considerable attention for its good electrical properties and advantages in building microstructures in high‐density devices. However, SEG problems, such as an unclear process window, selectivity loss, and nonuniformity have often made application difficult. In our study, we derived processing diagrams for SEG from thermodynamics on gas‐phase reactions so that we could predict the SEG process zone for low pressure chemical vapor deposition. In addition, with the help of both the concept of the effective supersaturation ratio and three kinds of E‐beam patterns, we evaluated and controlled selectivity loss and nonuniformity in SEG, which is affected by the loading effect. To optimize the SEG process, we propose two practical methods: One deals with cleaning the wafer, and the other involves inserting dummy active patterns into the wide insulator to prevent the silicon from nucleating.     

LPCVD设备的高精度串级温度控制系统

在大部分半导体工艺中,温度都是最重要的工艺参数之一,炉温的均匀性和稳定度对工艺都有着至关重要的影响。主要介绍了LPCVD设备中的高精度串级温度控制系统,该系统结构简单,控制效果良好,温度稳定度≤±0.5℃/24h。     

Formation of titanium and cobalt germanides on Si (100) using rapid thermal processing

Titanium and cobalt germanides have been formed on Si (100) substrates using rapid thermal processing. Germanium was deposited by rapid thermal chemical vapor deposition prior to metal evaporation. Solid phase reactions were then performed using rapid thermal annealing in either Ar or N₂ ambients. Germanide formation has been found to occur in a manner similar to the formation of corresponding silicides. The sheet resistance was found to be dependent on annealing ambient (Ar or N₂) for titanium germanide formation, but not for cobalt germanide formation. The resistivities of titanium and cobalt germanides were found to be 20 μΩ-cm and 35.3μΩ-cm, corresponding to TiGe₂ and Co₂Ge, respectively. During solid phase reactions of Ti with Ge, we have found that the Ti₆Ge₅ phase forms prior to TiGe₂. The TiGe₂ phase was found to form approximately at 800° C. Cobalt germanide formation was found to occur at relatively low temperatures (425° C); however, the stability of the material is poor at elevated temperatures.     

Rapid thermal chemical vapor deposition of in-situ boron doped polycrystalline SIxGe1-x

In-situ doped polycrystalline Si_xGe_1-x (x = 0.7) alloys were deposited by rapid thermal chemical vapor deposition (RTCVD) using the reactive gases SiH₂Cl₂, GeH₄ and B₂H₆ in a H₂ carrier gas. The depositions were performed at a total pressure of 4.0 Torr and at temperatures 600° C, 650° C and 700° C and different B₂H₆ flow rates. The conditions were chosen to achieve high doping levels in the deposited films. Our results indicate negligible effect of B₂H₆ flow on the deposition rate. The depositions follow an Arrhenius type behavior with an activation energy of 25 kcal/mole. Boron incorporation in the films was found to follow a simple kinetic model with higher boron levels at lower deposition rates and higher B₂H₆ flow rates. As-deposited resistivities as low as 2 mΩ-cm were obtained. Rapid thermal annealing (RTA) in the temperature range 800-1000° C was found to reduce the resistivity only marginally due to the high levels of boron activation achieved during the deposition process. The results indicate that polycrystalline Si_xGe_1-x films can be deposited by RTCVD with resistivities comparable to those reported for in-situ doped polysilicon.     

SiH_4－O_2体系LPCVD SiO_2薄膜的工艺及其应用

本文研究了ＳｉＨ４—Ｏ２体系ＬＰＣＶＤＳｉＯ２的工艺及设备。为了得到厚度均匀性好的薄膜，改进了反应气体的进气方式和装片舟的结构，获得了每炉１００片、直径为１００ｍｍ的硅片的膜厚不均匀性≤士５％的结果。     

低损耗高集成度氮化硅阵列波导光栅波分(解)复用器

氮化硅平台阵列波导光栅(AWG)波分(解)复用器具有损耗低、集成度高、温度敏感性低等优势。基于联合微电子中心有限责任公司(CUMEC)的氮化硅集成光子工艺平台,从波导传输损耗、阵列波导与平板波导模式转换损耗、截断损耗、泄漏损耗等方面对氮化硅基AWG波光(解)复用器插入损耗进行了优化,并采用标准CMOS工艺完成低损耗C波段AWG密集波分(解)复用器制备。该氮化硅基AWG密集波分(解)复用器输出通道数为16,输出通道频率间隔200 GHz。测试结果表明,该AWG波分(解)复用器的平均插入损耗为2.34 dB,1 dB带宽为0.44 nm,3 dB带宽为0.76 nm,串扰约为-28 dB。芯片尺寸为850μm×1700μm,较平面光波导(PLC)基AWG大大减小。     

低压化学气相淀积计算机模拟

讨论了一个二驱动模型，分析气体在淀积过程中的反应机理，将气体的淀积过程分为各向同性和各向异性的结合,在此基础上提出一个LPCVD二维淀积模型，模型考虑了中间产物的作用，将粘滞系数转换为各向同性和各向异性（Runi／Rd）的比值，这个模型在结构上比较简单，计算方便，因此能得到与实际较为符合的结构．通过C语言编程将模型变为程序，使用线算法使得程序较为简单，计算速度非常快。利用该软件在给定的工艺条件下模拟得到符合实验数据的结果.     

SiC MESFET反向截止漏电流的研究

给出了一种减小SiC MESFET栅漏反向截止漏电流的工艺方法,通过采用LPCVD淀积厚SiO2和高温氧化工艺,使器件的性能得到一定的提升.从实验数据看出,器件在S波段工作时,器件的反向截止漏电流大幅度下降,且分散性得到改善,其功率附加效率和功率增益也分别提高了10%和1.5 dB.该方法充分发挥了SiC材料能形成自身氧化层的优势,结合Si工艺的特点,减小了氧化层的缺陷,并在一定程度上减小了器件的寄生电容.     

4H-SiC同质外延中的缺陷

从实验出发,用LPCVD外延系统在偏向<11-20>方向8°的4H-SiC(0001)Si面衬底上,利用CVD技术进行了4H-SiC同质外延生长。外延后在熔融KOH腐蚀液中进行腐蚀,使用SEM和光学显微镜表征方法探讨了CVD法4H-SiC同质外延中的位错、微管和孪晶等缺陷形貌,并分析其形成机理。     

LPCVD系统淀积多晶硅薄膜的发雾分析

叙述了采用LPCVD系统淀积多晶硅薄膜的机理,分析了在淀积多晶硅薄膜过程中引起发雾的因素,指出了保持LPCVD系统的洁净能有效消除在淀积多晶硅薄膜过程中出现的发雾现象.