A novel high reliability CMOS SRAM cell

A novel 8T single-event-upset(SEU) hardened and high static noise margin(SNM) SRAM cell is proposed. By adding one transistor paralleled with each access transistor,the drive capability of pull-up PMOS is greater than that of the conventional cell and the read access transistors are weaker than that of the conventional cell.So the hold,read SNM and critical charge increase greatly.The simulation results show that the critical charge is almost three times larger than that of the conventional 6T cell by appropriately sizing the pull-up transistors.The hold and read SNM of the new cell increase by 72%and 141.7%,respectively,compared to the 6T design,but it has a 54%area overhead and read performance penalty.According to these features,this novel cell suits high reliability applications,such as aerospace and military.     

软件中的错误传播分析

错误传播是分析可靠性系统不确定性中的一基本问题,可用于发现系统中最易受到错误攻击的部分及各部分之间的相互影响.分别在信号和模块级别上研究了错误在软件中的传播过程,并定义了描述此过程的参数及其计算方法,其中首次提出了模块泄漏率和活动率的概念并给出了计算方法;然后把该错误传播分析框架应用于某卫星光纤陀螺捷联航姿控制系统上.通过故障注入实验确定了其中的分析参数,验证了提出的错误传播框架的可行性与正确性.     

Fault-tolerant control of real-time systems in the presence of single event upsets

High energy radiation environments, such as in space or in the presence of a nuclear event can adversely affect the operation of digital devices, presenting significant problems of reliable control to both Hardware and Software Engineers. These problems, although only recently addressed, have important implications for both military aircraft and space vehicles.The phenomenon known as Single-Event-Upset (SEU) occurs when bistable devices, such as memory, are corrupted by a collision with an high energy particle. These particles are found in abundance in radioactive environments and in outer space. An SEU can produce a variety of undesirable scenarios for a computer that range from annoying to catastrophic and can be either temporary or permanent. Some of these scenarios are; alteration of program memory, corruption of RAM or of a CPU register, and spurious or missed interrupts. A variety of techniques employing hardware, or both have been developed to enable recovery from an SEU. These schemes include RAM scrubbing, coding, fault-tolerant software, and judicious selection of hardware. A unique set of these and other techniques were developed for use on the Space Shuttle Inertial Measurement (IMU) computer.This paper provides an introduction to the phenomenon of the SEU, a review of some of the existing software techniques and hardware selection considerations to combat the effects of SEUs, and a discussion of the application of the techniques in the fault-tolerant, real-time control software for the Space Shuttle IMU's embedded computer.