Effect of annealing process on the surface roughness in multiple Al implanted 4H-SiC |
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Authors: | Wu Hailei Sun Guosheng Yang Ting Yan Guoguo Wang Lei Zhao Wanshun Liu Xingfang Zeng Yiping Wen Jialiang |
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Affiliation: | 1. Novel Semiconductor Material Laboratory, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China 2. China Electric Power Research Institute, Beijing 100192, China |
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Abstract: | A P-layer can be formed on a SiC wafer surface by using multiple Al ion implantations and postimplantation annealing in a low pressure CVD reactor.The Al depth profile was almost box shaped with a height of 1 × 1019cm-3 and a depth of 550 nm.Three different annealing processes were developed to protect the wafer surface.Variations in RMS roughness have been measured and compared with each other.The implanted SiC,annealed with a carbon cap,maintains a high-quality surface with an RMS roughness as low as 3.8 nm.Macrosteps and terraces were found in the SiC surface,which annealed by the other two processes (protect in Ar/protect with SiC capped wafer in Ar).The RMS roughness is 12.2 nm and 6.6 nm,respectively. |
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Keywords: | 4H-SiC ion implantation annealing surface morphology |
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