A GaAs MESFET with a partially depleted p layer for SRAMapplications |
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Authors: | Noda M. Hosogi K. Sumitani K. Nakano H. Nishitani K. Otsubo M. Makino H. Tada A. |
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Affiliation: | Mitsubishi Electr. Corp., Itami; |
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Abstract: | A GaAs MESFET with a partially depleted p layer that has a specific application to SRAMs has been developed. The short-channel effect is well suppressed for gate lengths down to 0.5 μm by a rather dense p layer buried under the channel. Its acceptor ion dose is as high as 2×1012 cm-2, which corresponds to a partially depleted condition. As for applications for SRAMs, it is possible to attain fully functional 7-ns 4-kb SRAMs that are operative at 75°C by using the FET with a 1-μm gate. A chip yield of 22% has been achieved in a 3-in wafer |
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