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Logic circuit synthesis using Prolog |
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| Authors: | Takao Uehara Nobuaki Kawato |
| Affiliation: | 1. Fujitsu Laboratories Ltd., Kawasaki, 1015 Kamikodanaka Nakahara-ku, 211, Kawasaki, Japan |
| Abstract: | This paper briefly reviews the current use of CAD in logic design, and then describes an expert system used to synthesize logic circuits. Specialized knowledge dealing with standard TTL ICs is written in Prolog and AGE, and the results are compared. |
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