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一种基于图模式匹配的逻辑单元映射算法
引用本文:倪刚,来金梅,童家榕.一种基于图模式匹配的逻辑单元映射算法[J].计算机辅助设计与图形学学报,2006,18(12):1850-1854.
作者姓名:倪刚  来金梅  童家榕
作者单位:复旦大学专用集成电路与系统国家重点实验室,上海,201203
基金项目:国家高技术研究发展计划(863计划);国家自然科学基金;上海市应用材料科技合作共同计划
摘    要:基于数学中图模式匹配的概念,根据电路特征在于图同构算法中加入图约束条件,研究了针对不同结构的FPGA逻辑单元都能适用的映射算法FDUMap.实验中应用FDUMap将测试电路映射到不同的逻辑单元中,该算法比现有的专用的逻辑单元映射算法通用性更好,而平均性能上仅相差3%。

关 键 词:逻辑单元映射  工艺映射  图模式匹配  现场可编程门阵列
收稿时间:2006-01-26
修稿时间:2006-08-08

A Logic Cell Mapping Algorithm Based on Graph Pattern-Matching
Ni Gang,Lai Jinmei,Tong Jiarong.A Logic Cell Mapping Algorithm Based on Graph Pattern-Matching[J].Journal of Computer-Aided Design & Computer Graphics,2006,18(12):1850-1854.
Authors:Ni Gang  Lai Jinmei  Tong Jiarong
Abstract:Based on the concept of graph pattern-matching, a universal FPGA logic cell mapping algorithm (FDUMap) was studied by adding graph constraints to subgraph isomorphism algorithm according to circuit character. In the experiment, FDUMap can successfully map the benchmarks to logic cells of different structures. Compared with existing logic cell specific mapping algorithms, FDUMap is better in universality and only 3% worse in average performance.
Keywords:logic cell mapping  technology mapping  graph pattern-matching  field programmable gate array
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