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Fault macromodeling and a testing strategy for opamps
Authors:Chen-Yang Pan  Kwang-Ting Cheng  Sandeep Gupta
Affiliation:(1) Dept of Electrical & Computer Engineering, University of California, 93106 Santa Barbara, CA, USA;(2) Dept. of Electrical Engineering—Systems, University of Southern California, 90089 Los Angeles, CA, USA
Abstract:In this paper, we propose a simple testing technique based on DC measurements for operational amplifiers. We first develop a comprehensive macromodel for the transistor-level opamp to alleviate the efforts of fault simulation. By incorporating appropriate I/O characteristics into the macromodel, the output deviation due to the modeling error can be significantly reduced. We use the transistor short/bridging faults to illustrate the efficiency of our proposed technique. Experimental results show that a high fault coverage can be achieved for the stand-alone opamp by measuring two DC parameters V o-max * and V o-min *. For the embedded opamps, many short/bridging faults cannot be detected by traditional functional testing. However, by using similar DC measurements along with a design for testability (DFT) scheme, we can improve the fault coverage dramatically.An earlier version of this work was reported in ICCAD-94.
Keywords:analog test  catastrophic fault model  parametric faults  macromodeling  operational amplifier design for testability
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