Datapath BIST Insertion Using Pre-Characterized Area and Testability Data |
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Authors: | JC Wang PS Cardoso JAQ Gonzalez M Strum R Pires |
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Affiliation: | (1) Electronic Systems Department, Escola Politécnica da Universidade de São Paulo, Brazil;(2) Technological Center, Universidade Cruzeiro do Sul, Brazil |
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Abstract: | There are several ways to insert Built-in Self-Test (BIST) circuitry on a circuit, each of them with particular consequences on area overhead, test application time and fault coverage. This paper presents a BIST insertion methodology applied to datapaths described at the RTL level that uses a database containing: (a) testability data of several types of test pattern generators (TPGs) and signature analyzers (SAs) when connected to several types of functional units and (b) area overhead due to the implementation by a datapath register of each type of those test resources. The availability of this database makes then possible to choose the best test resource types associated to each functional unit in a datapath, leading to good testability and area results. |
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Keywords: | test library self-test RTL architecture pre-computed testability |
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