基于关键IP核加固的片上网络容错机制

片上网络中的路由器故障将导致与其相连的IP核不能通信,严重影响了片上网络的性能.因此提出一种基于片上网络2D-mesh结构的容错机制,通过将关键IP核的资源网络接口与相邻节点的资源网络接口相连进行IP核的加固,在每个路由器的各个端口中配置邻居节点状态寄存器标示邻居节点的好坏,在路由计算时通过检查寄存器绕过故障路由器,同...

Fault tolerant mechanism of the network on chip with the critical IP core strengthening

The fault of router in network on chip will make the IP core connected with it lose communication with others, which affects the performance of the network on chip seriously. This paper presents a fault tolerance mechanism based on 2D-mesh structure. This mechanism connects the resource network interface of the critical IP core to neighbors＇ to strengthen the critical IP core, and add a status register in each router to indicate whether the neighbor router is good or not, so in the routing calculation stage the router can make routing to bypass the fanlty routers. And at the same times the congestion mechanism is used to improve the efficiency of the communication of network on chip. Quartus II software is used to verify the electrocircuit in this paper, and OPNET software is used to test the fault tolerant mechanism. The experiment results show that the proposed mechanism can strengthen the critical IP core, and what＇s more the routers can tolerate the faults of the other routers in the case of increasing only 2.9% hardware overhead, which outperforms the other emerging alternative NoCs.