| Improvements on voltage-resistant performance of bipolar static induction transistor （BSIT） with buried gate structure |
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| 作者姓名： | WANG YongShun FENG JingJing LIU ChunJuan WANG ZiTing WANG ZaiXing ZHANG CaiZhen |
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| 作者单位： | School of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, China |
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| 基金项目： | This project was supported by Scientific and Technological Supporting Program of Gansu Province （Grant No. 097GKCA052）. |
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| 摘 要： |
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| 关 键 词： | 静电感应晶体管 BSIT 器件性能 双极型 耐电压 栅结构 击穿电压 阻断电压 |
Improvements on voltage-resistant performance of bipolar static induction transistor （BSIT） with buried gate structure |
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| WANG YongShun,FENG JingJing,LIU ChunJuan,WANG ZiTing,WANG ZaiXing,ZHANG CaiZhen.Improvements on voltage-resistant performance of bipolar static induction transistor （BSIT） with buried gate structure[J].SCIENCE CHINA Information Sciences,2012(4):962-970. |
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| Abstract: | |
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| Keywords: | bipolar static induction transistor voltage-resistant capability punch-through deep trench |
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