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基于FPGA的记忆多项式数字预失真器的实现
引用本文:张华良,贾宝富. 基于FPGA的记忆多项式数字预失真器的实现[J]. 真空电子技术, 2010, 0(5): 30-32,43
作者姓名:张华良  贾宝富
作者单位:电子科技大学物理电子学院,四川成都610054
摘    要:
介绍了一种基于FPGA的记忆多项式数字预失真器的实现。首先,通过间接学习结构采用LMS算法提取记忆多项式系数;其次,变换记忆多项式的形式,构造易于FPGA实现的基于查找表(LUT)的预失真单元;最后给出了顶层模块图及实验结果,结果充分表明了该预失真器的有效性。

关 键 词:数字预失真  非线性  记忆效应  记忆多项式  功率放大器

FPGA Implementation of MP Digital Predistortion Linearizers
ZHANG Hua-liang,JIA Bao-fu. FPGA Implementation of MP Digital Predistortion Linearizers[J]. Vacuum Electronics, 2010, 0(5): 30-32,43
Authors:ZHANG Hua-liang  JIA Bao-fu
Affiliation:(School of Physical Electronics,UESTC,Chengdu 610054,China)
Abstract:
This paper describes the implementation of FPGA-based memory polynomial predistorter.Firstly,the coefficients of memory polynomial are extracted by using LMS algorithm with indirect learning structure;Secondly,transform the form of polynomial to construct LUT-based predistortion unit;Finally,the top-level block diagram are represented and the effectiveness of the predistortion linearizers are demonstrated by experimental results obtained in a real platform.
Keywords:Digital predistortion  Non-linearity  Memory effects  Memory polynomial  Power amplifier
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