Development of Stretch Solder Interconnections for Wafer Level Packaging |
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Authors: | Rajoo R Lim SS Wong EH Hnin WY Seah SKW Tay AAO Iyer M Tummala RR |
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Affiliation: | Inst. of Microelectron., Singapore; |
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Abstract: | A wafer level packaging technique has been developed with an inherent advantage of good solder joint co-planarity suitable for wafer level testing. A suitable weak metallization scheme has also been established for the detachment process. During the fabrication process, the compliancy of the solder joint is enhanced through stretching to achieve a small shape factor. Thermal cycling reliability of these hourglass-shaped, stretch solder interconnections has been found to be considerably better than that of the conventional spherical-shaped solder bumps. |
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